Unit Shift Register Circuit Bootstrapping Without Diode-Connected TFT

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Solution Overview

Problem

Existing unit shift register circuits face challenges in reducing the influence of characteristics deterioration in amorphous silicon or oxide semiconductor-based TFTs, leading to unstable operation and increased circuit elements due to threshold voltage variations and temperature dependency.

Innovation Solution

The proposed unit shift register circuit employs a configuration with an output transistor and a setting transistor, where the setting transistor receives different input signals to charge the output transistor's gate, allowing for bootstrapping without a diode-connected TFT and second bootstrapping capacitor, using a multi-phase clock signal and oxide semiconductors like indium gallium zinc oxide, and includes a reset and pull-down circuit to stabilize the operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a diode-connected TFT and second bootstrapping capacitor are used to pre-charge the gate electrode, then the threshold voltage variation is compensated, but the circuit surface area increases

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidcircuit surface area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The invention extracts and eliminates the diode-connected TFT and second bootstrapping capacitor from the circuit configuration. By using a different charging mechanism where the gate electrode is charged directly from the power supply through a switching transistor, the pre-charge function is achieved without requiring the additional components that were previously necessary for threshold voltage compensation.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If large TFTs are used to account for characteristic deterioration, then the pre-charge voltage is maintained, but the circuit surface area increases

Engineering Contradiction:
Improvepre-charge voltage stabilityVSAvoidcircuit surface area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The invention changes the operational parameters by implementing a multi-phase clock signal system that controls switching transistors to precisely timing the charging and discharging of the gate electrode. This temporal control mechanism allows the use of smaller TFTs while maintaining stable pre-charge voltage through controlled charge transfer rather than relying on larger device dimensions.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If two bootstrapping capacitors are used to desensitize the circuit to threshold voltage variations, then the circuit stability is improved, but the number of circuit elements increases

Engineering Contradiction:
Improvecircuit stabilityVSAvoidnumber of circuit elements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention merges the functions of multiple capacitors into a single bootstrapping capacitor. By combining the charge storage function with the switching control function in a unified circuit architecture, the circuit achieves the same stability against threshold voltage variations with fewer discrete components, thereby reducing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

4Ease of manufacture

If amorphous silicon or oxide semiconductor TFTs are used, then the manufacturing process is simplified, but the threshold voltage varies due to aging and temperature

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidthreshold voltage stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The invention applies preliminary action by pre-charging the gate electrode to a specific voltage level before the TFT undergoes threshold voltage drift due to aging or temperature changes. The multi-phase clock system proactively manages the charge state, ensuring that even as the threshold voltage shifts over time, the gate maintains the appropriate voltage level for proper operation throughout the device lifetime.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces the influence of characteristics deterioration with a smaller number of circuit elements, maintaining stable operation and reducing the impact of threshold voltage shifts, thereby improving the operating margin and reducing circuit surface area.

Implementation Method 1

a first bootstrapping capacitor C2 connected between the gate of the drive transistor and the output of that stage, and an input transistor Tin1 (setting TFT), controlled by the first input Rn−1, for the purpose of charging the first bootstrapping capacitor C2

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

diode-connected TFTs are used to pre-charge the gate electrodes and also so that there is no leakage at the time of boosting

Methodology Applied
Scientific EffectDiode connection: Diode

Implementation Method 3

the gates of output TFTs used to drive the scanning lines operate with a voltage raised to a high voltage by bootstrapping

Methodology Applied
Scientific EffectBootstrapping:

Data Source

PatentUS10068543B2Unit shift register circuit, shift register circuit, method for controlling unit shift register circuit, and display device
Publication Date: 2018.09.04 SHARP KK
  • US10068543B2 patent drawing
  • US10068543B2 patent drawing
  • US10068543B2 patent drawing

AI summary

A unit shift register circuit constitutes each stage of a shift register circuit. The unit shift register circuit includes an output transistor (T1) configured to input a prescribed clock signal (CK) to a drain terminal, and output an output signal (OUT) from a source terminal. The unit shift register circuit includes a setting transistor (T2) in which a source terminal is connected to a gate electrode of the output transistor (T1), is configured to input an input signal (S) to the drain terminal, and is configured to input to a gate electrode an input signal (VS) in a case of charging a gate electrode (node (VC)) of the output transistor (T1). The input signal (VS) having a voltage higher than that of the input signal (S).