Shift Register Driver Circuit With Two-Transistor Capacitor Topology

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Solution Overview

Problem

Existing driver circuits in display devices face issues with increased power consumption due to current flow through transistors, delayed signal rise times due to high channel length to channel width ratios, and a large number of elements required, leading to layout area challenges and signal distortion.

Innovation Solution

A semiconductor device configuration that includes a first transistor connected between two wirings, a second transistor with its gate connected to the first transistor's gate, and a capacitor connected between a third wiring and the second transistor's drain, allowing for reduced current flow, shorter signal rise times, and fewer elements, thereby minimizing power consumption and layout area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If both transistors M3 and M4 are turned on when signal IN is at high level, then the driver circuit can be composed of transistors with the same conductivity type, but current flows through the transistors from VDD to VSS causing increased power consumption

Engineering Contradiction:
Improvedriver circuit compositionVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent applies dynamic control by introducing a control signal that selectively turns transistors on and off based on the input signal state. When the control signal is at a first level, transistors are turned off to prevent current flow and reduce power consumption. When the control signal is at a second level, transistors are turned on to enable signal transmission. This dynamic switching resolves the contradiction by making power consumption conditional rather than constant.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic action through alternating states of transistor activation. The transistors switch between on-state and off-state in periodic cycles synchronized with the input signal transitions. During high-level input periods, transistors are turned off to minimize power consumption; during low-level input periods, transistors are turned on for signal transmission. This periodic switching pattern resolves the energy loss issue while maintaining circuit functionality.

Inventive Principle:
Principle #19Periodic action

2Loss of energy

If the channel length to channel width ratio is increased to reduce current flow, then power consumption decreases, but signal rise time is delayed causing distortion

Engineering Contradiction:
Improvecurrent flowVSAvoidsignal rise time
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The patent uses dynamic control signals to adjust transistor operation modes in real-time. Rather than relying solely on fixed physical dimensions (L/W ratio), the control signal dynamically modulates transistor conductivity, enabling the circuit to achieve low current flow during non-critical periods while maintaining fast response during signal transitions. This dynamic approach decouples the trade-off between power consumption and signal speed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of transistors through control signals rather than relying only on physical parameter changes (L/W ratio). By varying the gate voltage through control signals, the transistor's effective conductivity is adjusted dynamically. This allows the circuit to achieve both low power consumption (when transistors are partially off) and fast signal rise time (when transistors are fully on during transitions), resolving the contradiction between these two parameters.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If more elements are used in the driver circuit to achieve proper signal control, then signal distortion is reduced, but layout area increases

Engineering Contradiction:
Improvesignal controlVSAvoidlayout area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements multi-functionality by using the same transistors for multiple purposes: signal transmission, power control, and distortion prevention. The control signal mechanism serves multiple functions simultaneously - it enables signal passage when needed, blocks current flow to reduce power consumption, and prevents signal distortion through proper timing control. This eliminates the need for separate dedicated elements for each function, reducing overall layout area while maintaining signal control reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple circuit functions into a unified transistor-based structure controlled by a single control signal mechanism. Rather than using separate elements for power control, signal transmission, and distortion prevention, the invention combines these functions into the same transistor network that is dynamically controlled. This consolidation reduces the total number of elements required and minimizes layout area while achieving reliable signal control.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250142970A1Semiconductor device
Publication Date: 2025.05.01 SEMICON ENERGY LAB CO LTD
  • US20250142970A1 patent drawing
  • US20250142970A1 patent drawing
  • US20250142970A1 patent drawing

AI summary

Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.