Shift Register Transistor Channel Length Optimization
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Solution Overview
Problem
Conventional shift registers experience signal dullness due to leakage currents, especially in high-voltage applications and at elevated temperatures, leading to incorrect operation of display devices.
Innovation Solution
The shift register design incorporates control transistors with longer channel lengths than output transistors to reduce leakage currents, ensuring stable gate potentials and preventing signal dullness, with specific configurations involving capacitively coupled gate potentials and controlled transistor states during clock passing periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional shift register with standard channel length transistors is used, then the device complexity is low and manufacturing is easy, but leakage current increases causing signal dullness and incorrect operation
Solution Approach 1:
The patent applies different channel lengths to different transistors within the shift register circuit. Specifically, the first transistor (control transistor) has a longer channel length than the second transistor (output transistor) to reduce leakage current effects on the control node, while the second transistor maintains a shorter channel length for efficient signal output. This local differentiation of transistor characteristics resolves the contradiction between reliability and device complexity.
2Reliability
If the channel length of control transistors is increased to reduce leakage current, then signal integrity improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent changes the channel length parameter of transistors to optimize performance. By setting the first transistor's channel length to be longer than the second transistor's channel length, the design exploits parameter variation to reduce leakage current and stabilize gate potential, thereby improving reliability while managing manufacturing precision requirements.
3Temperature
If high voltage is applied to achieve required scanning signal line potential, then display performance improves, but leakage current increases causing signal dullness
Solution Approach 1:
The patent addresses the voltage-leakage contradiction by applying local quality differentiation to transistor channel lengths. The first transistor with longer channel length specifically handles the high voltage control function while minimizing leakage, allowing the circuit to operate at required voltage levels without signal dullness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces leakage currents and maintains signal integrity, preventing dullness and ensuring correct operation of display devices even under high-voltage and high-temperature conditions.
Implementation Method 1
a capacitor (16) provided between the gate and the source of the transistor (11)
Implementation Method 2
the potential of the node N9 increases up to about (2×Vck) (where Vck is amplitude of the clock signal CK) due to an effect of a capacitor 93 which exists between a gate and a source of the transistor 91 (bootstrap effect)
Data Source
AI summary
Provided is a shift register configured by cascade connecting unit circuits each including a bootstrap circuit. In at least one example embodiment, for the unit circuits, a time period during which a transistor is in an ON state and a clock signal is high level corresponds to a clock passing period. Among transistors whose one conduction terminal is connected to a gate of the transistor, channel lengths of transistors configured such that a low-level potential is fed to gates of the transistors to turn the transistors to an OFF state in the clock passing period and that a low-level potential is applied to the conduction terminal of the transistors in the clock passing period are made longer than the channel length of the transistor. With this, it is possible to reduce a leakage current in the clock passing period, and to prevent the fluctuation of a gate potential of the transistor and dullness in an output signal from occurring.