Shift Register Unit Charging Enhancement for Stable OLED Scanning
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Solution Overview
Problem
Existing gate drivers in OLED displays face challenges in reducing chip area, achieving narrow frame and high resolution, and suffer from uneven brightness and scanning line issues due to sequential row-by-row compensation methods, which cause threshold voltage drift and abnormal output in shift register units.
Innovation Solution
A shift register unit with a first input circuit, output circuit, and charging enhancement circuit is introduced, allowing for random compensation and enhanced node levels to improve reliability and avoid abnormal outputs, while supporting both display and external compensation operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sequential row-by-row compensation method is used, then compensation function is achieved, but threshold voltage drift and abnormal output occur causing uneven brightness and scanning line issues
Solution Approach 1:
The patent implements dynamic compensation by enabling shift register units to switch between sequential row-by-row compensation mode and random compensation mode. This dynamic approach allows the system to adaptively select compensation strategies based on operational requirements, preventing threshold voltage drift while maintaining display stability.
Solution Approach 2:
The patent employs periodic random compensation intervals interspersed with sequential row-by-row compensation operations. By periodically introducing random compensation actions, the system prevents cumulative threshold voltage drift that would otherwise occur with continuous sequential compensation, thereby eliminating scanning line issues and uneven brightness.
2Ease of manufacture
If chip area is reduced for cost reduction, then manufacturing cost decreases, but circuit integration density increases making design more difficult
Solution Approach 1:
The patent designs shift register units with multi-functional capability, where each unit can perform both sequential row-by-row compensation and random compensation functions. This universal design allows the circuit to achieve higher integration density without sacrificing functionality, as the same hardware structure supports multiple compensation modes rather than requiring separate dedicated circuits for each mode.
Solution Approach 2:
The patent divides the gate driver into multiple independent shift register units that can operate autonomously. Each unit is segmented with its own compensation capabilities, allowing the overall system to achieve high integration density through modular architecture while maintaining manufacturing simplicity through standardized unit designs that can be replicated across the chip.
3Manufacturing precision
If narrow frame and high resolution are achieved, then display quality improves, but chip area reduction becomes more challenging
Solution Approach 1:
The patent changes the operational parameters of the shift register units by implementing random compensation with variable timing and sequence. This parameter variation allows the system to maintain high display resolution and narrow frame design while optimizing chip area utilization, as the dynamic parameter adjustment enables more efficient packing of circuit elements without compromising signal integrity or display quality.
Data Source
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AI summary
A shift register unit, a driving method thereof, a gate driver and a display device are provided. The shift register unit(10) includes a first input circuit (100), an output circuit (200) and a charging enhancement circuit (300). The first input circuit (100) is configured to charge a first node (Q) in response to a first input signal (STU1); the output circuit (200) is configured to output a shift signal (CR) and a first output signal (OUT1) under control of a level of the first node (Q); and the charging enhancement circuit (300) is configured to further enhance the level of the first node (Q) in response to a charging enhancement signal (CE). The shift register unit (10) may enhance the level of the first node (Q) and the reliability of the gate driver (20) and the display device (1) consisted of the shift register unit (10).