Shift Register Checkpointing via Circular Buffer and Update History
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Solution Overview
Problem
Existing methods for check pointing a shift register are inefficient due to the significant duplication of information between the shift register and check points, leading to wasteful storage of full copies and inefficient restoration processes.
Innovation Solution
Implementing a hardware structure and method that uses a circular buffer with additional data positions for each check point and period of time, along with an update history shift register to identify active data positions and derive check points, reducing the need for full copies by leveraging the update history to determine the current and past states of the shift register.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If full copies of shift register states are stored for each check point, then restoration capability is improved, but storage requirements increase significantly
Solution Approach 1:
The patent segments the check point storage into two parts: a compact representation (update history shift register) that stores only the changes, and the main shift register that holds the current state. This segmentation allows restoration capability while minimizing storage requirements by only storing what has changed rather than full copies.
Solution Approach 2:
The patent extracts only the essential information needed for restoration (the updates/changes) from the full shift register state and stores separately in the update history shift register. This extraction principle enables storing minimal data while preserving the ability to reconstruct any past state by applying the extracted updates to the appropriate base state.
2Reliability
If full copies of shift register states are stored for each check point, then restoration accuracy is improved, but device complexity increases
Solution Approach 1:
The patent divides the restoration mechanism into two functional segments: the update history shift register that tracks changes and the main shift register that holds current state. This segmentation simplifies the overall hardware structure compared to storing multiple full copies, while maintaining restoration accuracy through the combination of base state and updates.
Solution Approach 2:
Instead of copying full shift register states, the patent copies only the updates/changes in the update history shift register. This selective copying approach reduces device complexity by storing minimal information while preserving the ability to accurately restore any past state by reapplying the copied updates to the appropriate base state.
3Quantity of substance
If update history shift register is used to track changes, then storage efficiency is improved, but information loss risk increases
Solution Approach 1:
The patent implements a feedback mechanism where the update history shift register continuously tracks and records changes made to the main shift register. This feedback ensures that no information is lost because every modification is captured and can be replayed to reconstruct any past state, maintaining data completeness while achieving storage efficiency.
Solution Approach 2:
The update history shift register acts as an intermediary that bridges the current shift register state and past states. By storing the sequence of updates in this intermediary structure, the patent enables reconstruction of any historical state without storing full copies, thus preventing information loss while maintaining storage efficiency.
Data Source
AI summary
Hardware structures for check pointing a main shift register one or more times which include a circular buffer used to store the data elements most recently shifted onto the main shift register which has an extra data position for each check point and an extra data position for each restorable point in time; an update history shift register which has a data position for each check point which is used to store information indicating whether the circular buffer was updated in a particular clock cycle; a pointer that identifies a subset of the data positions of the circular buffer as active data positions; and check point generation logic that derives each check point by selecting a subset of the active data positions based on the information stored in the update history shift register.