Shift Register Circuit for Amorphous Silicon TFT-LCD Stability
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Solution Overview
Problem
Conventional shift register circuits in amorphous silicon TFT-LCDs face issues with threshold voltage shift due to DC stress and through-current, leading to reliability deterioration and power inefficiency.
Innovation Solution
A shift register circuit design incorporating a gate line driving circuit, timing control circuit, and holding device control circuit, which stabilizes the gate line input node and prevents unnecessary current consumption by ensuring that the second and third input terminals are not simultaneously set to the H level, thereby reducing through-current and DC stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the high-level voltage is continuously applied to the gate terminal of the output transistor, then the TFT can maintain its driving state, but the threshold voltage shifts due to DC stress and driving ability deteriorates over time
Solution Approach 1:
The patent applies periodic action by controlling the gate terminal voltage to be applied intermittently rather than continuously. The voltage is supplied only when needed for charging the capacitor during specific timing periods, and not during other periods, thereby preventing continuous DC stress on the TFT while maintaining necessary driving functionality
Solution Approach 2:
The patent implements preliminary action by controlling the timing of voltage application to the gate terminal. The voltage is applied in advance only when the capacitor needs to be charged, and the control circuit prepares the voltage supply timing beforehand to avoid unnecessary continuous application that would cause threshold shift
2Adaptability or versatility
If the second and third input terminals are simultaneously set to the H level, then the circuit can respond to multiple input signals, but unnecessary through-current flows through the transistors
Solution Approach 1:
The patent introduces a control circuit as an intermediary between the second and third input terminals and the transistors. This control circuit monitors the states of both input terminals and only activates the transistors when necessary, preventing direct simultaneous conduction that would cause through-current while still allowing the circuit to respond to multiple input signals through proper timing control
3Ease of manufacture
If the shift register circuit is integrated with TFTs to reduce fabrication costs and area, then manufacturing efficiency improves, but stability of the gate terminal and current consumption issues arise
Solution Approach 1:
The patent applies dynamics by making the gate terminal voltage supply dynamic rather than static. The voltage is supplied adaptively based on the operational needs of the circuit, changing its state between applied and not applied according to the charging requirements of the capacitor, thereby maintaining reliability while preserving the integrated structure benefits
Data Source
AI summary
A shift register circuit which stably operates with low electric power consumption and can realize a long life. In the shift register circuit constructed by connecting a plurality of fundamental circuits in each of which fundamental clocks of three phases are inputted to input terminals and is constructed by a gate line driving circuit, a timing control circuit, and a holding device control circuit, each of the gate line driving circuit and the timing control circuit has charging devices and holding devices. A node is stabilized by the timing control circuit.