Semiconductor Shift Register Circuit Stabilization
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Solution Overview
Problem
Semiconductor circuits, particularly shift register circuits, face issues with dynamic changes in transistor characteristics, leading to unreliable and inefficient operation due to varying waveform widths and frequency changes, especially when using low-temperature polysilicon or defective silicon transistors.
Innovation Solution
The implementation of a semiconductor circuit with a switch element that maintains an inactive potential for a longer period, replacing the traditional latch circuit, to stabilize output waveforms and reduce the impact of transistor characteristic changes, thereby ensuring constant waveform width, sufficient margins for frequency changes, high reliability, and high-speed drive.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a latch circuit is used to improve potential holding characteristic, then reliability is improved, but waveform width varies due to dynamic transistor characteristic changes
Solution Approach 1:
The invention changes the operational parameters of the circuit by using complementary clock signals (HCK and LCK) with opposite phases to control the switch elements. This parameter change ensures that when one transistor is in enhancement mode, the other is in depression mode, compensating for characteristic variations and maintaining consistent waveform widths
Solution Approach 2:
The invention inverts the traditional approach by using depression mode transistors instead of enhancement mode transistors for the switching elements. By controlling transistors to operate in depression mode during the inactive period, the circuit achieves more stable potential holding characteristics and consistent waveform widths
2Ease of manufacture
If low-temperature polysilicon transistors are used to simplify manufacturing, then ease of manufacture is improved, but transistor characteristic changes dynamically affecting circuit performance
Solution Approach 1:
The invention embraces the dynamic nature of low-temperature polysilicon transistor characteristics by designing a circuit that actively adapts to these changes. The complementary clock control and switch element configuration dynamically adjust to transistor characteristic variations, maintaining reliable operation despite the inherent instability of low-temperature polysilicon devices
Solution Approach 2:
The circuit incorporates feedback mechanisms through the complementary clock signal generation and the interconnection of switch elements where the state of one transistor affects the other. This feedback loop compensates for dynamic characteristic changes in low-temperature polysilicon transistors, ensuring stable circuit performance
3Use of energy by moving object
If a single-phase clock is used to reduce power consumption, then energy efficiency is improved, but frequency changes occur due to transistor characteristic variations
Solution Approach 1:
The invention uses periodic complementary clock signals (HCK and LCK) that alternate in phase to control the switch elements. This periodic action with opposite phases ensures that frequency variations in low-temperature polysilicon transistors do not affect the overall operating frequency stability, while still maintaining low power consumption through the single-phase clock input
Data Source
AI summary
A semiconductor circuit which outputs an active potential in a first period and which holds an inactive potential in a second period which is longer than the first period and then outputs the inactive potential, the semiconductor circuit includes a switch element which is connected between a potential supply section which supplies the inactive potential and a circuit output terminal, and which is brought into a conduction state in the second period so as to output the inactive potential to the circuit output terminal.