Shift Register Clock Control to Prevent Gate Signal Hysteresis
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Solution Overview
Problem
The threshold voltage shift of transistors in the driving circuit of display panels causes signal fluctuations and reduces reliability due to prolonged operation, especially affecting the gate drive signal.
Innovation Solution
A shift register with N cascaded units, including an input module, noise reduction module, pull-down control module, and output module, where the noise reduction module controls the second node to an inactive level when the input signal is active, and the pull-down control module receives an unfixed potential clock signal to prevent hysteresis and maintain signal accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If the driving circuit operates for a long time to provide gate control signals, then the display panel can maintain continuous operation, but the threshold voltage of transistors shifts causing signal fluctuations and reduced reliability
Solution Approach 1:
The patent applies periodic action by using clock signals to periodically reset the threshold voltage of transistors in the driving circuit. The reset operation is performed at specific intervals (when clock signals are at specific levels) to prevent cumulative threshold voltage shift during continuous operation, thereby maintaining signal stability over time without interrupting display operation.
2Stability of the object's composition
If the pull-down control module receives a fixed signal for a long time to maintain stable control, then the control signal remains consistent, but hysteresis phenomenon occurs causing characteristic curve changes and reduced signal accuracy
Solution Approach 1:
The patent applies dynamics by making the input signal to the pull-down control module variable rather than fixed. The input signal changes according to clock signal levels, which prevents the transistor from remaining in the same state indefinitely. This dynamic signaling approach eliminates hysteresis phenomenon while maintaining control consistency, as the transistor operates through different states periodically rather than staying static.
3Use of energy by moving object
If the absolute value of the critical value of the active level is reduced to lower power consumption, then energy efficiency improves, but the signal strength may be insufficient to drive the display panel
Solution Approach 1:
The patent applies preliminary action by pre-charging nodes to specific voltage levels before switching operations. The reset circuit prepares the threshold voltage of transistors in advance by setting it to appropriate levels based on clock signal states. This preliminary preparation ensures that subsequent switching operations can occur with lower voltage swings, reducing power consumption while maintaining sufficient driving capability through properly timed and leveled signals.
Data Source
AI summary
The present application discloses a shift register, a display panel and a display device, where the shift register includes N cascaded shift register units, each of which includes an input module, a noise reduction module, a pull-down control module, a pull-down module and an output module; where in the same shift register unit, the input module is configured to receive an input signal and control a signal of a first node; the noise reduction module is configured to receive the input signal and a first level signal, and control a transmission path of the first level signal to a second node; the pull-down control module is configured to receive a first clock signal and control a signal of the second node; the output module is configured to receive a second clock signal and a signal of the first node and control a gate drive signal.