Shift Register Clock Signal Reduction for AMOLED Displays

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Solution Overview

Problem

The integration of light-emitting control shift registers with scan control shift registers in AMOLED technology increases the number of clock signals, leading to reduced driving efficiency and higher product costs.

Innovation Solution

A shift register design that includes a pulling-up unit, a pulling-down unit, and an output unit, connected in a specific configuration to share clock signals with the light-emitting control shift register, reducing the overall number of clock signals required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the light-emitting control shift register is integrated with the scan control shift register, then the function of adjusting duty cycle and driving gate lines is achieved, but the number of clock signals increases

Engineering Contradiction:
Improvefunction integrationVSAvoidnumber of clock signals
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The shift register circuit is designed to perform multiple functions using a single set of clock signals. The same clock signals control both the scan control shift register function (driving gate lines) and the light-emitting control shift register function (adjusting duty cycle). This is achieved by sharing the clock signal terminals between the two functional blocks, making the circuit universal and multi-functional without requiring separate clock signal sets for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If the light-emitting control shift register is integrated with the scan control shift register, then dual control functions are achieved, but driving efficiency is reduced

Engineering Contradiction:
Improvedual control functionVSAvoiddriving efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent merges the light-emitting control shift register and scan control shift register into a single integrated circuit block. The two functional modules share common components including clock signal terminals, level terminals, and internal circuit structures. By combining these previously separate functions into one unified shift register circuit, the patent achieves dual control functionality while improving driving efficiency through reduced signal paths and eliminated redundancy.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If the light-emitting control shift register is integrated with the scan control shift register, then combined functionality is achieved, but product cost increases

Engineering Contradiction:
Improvecombined functionalityVSAvoidproduct cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The integrated shift register circuit is designed with universal components that serve dual purposes. The same transistors, capacitors, and clock signal terminals are utilized for both scan control and light-emitting control functions. This multi-functional design reduces the total component count and simplifies the circuit structure, making the integrated circuit more cost-effective to manufacture compared to implementing separate control registers.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10043586B2Shift register and method for driving the same, driving circuit and display device
Publication Date: 2018.08.07 BOE TECHNOLOGY GROUP CO LTD
  • US10043586B2 patent drawing
  • US10043586B2 patent drawing
  • US10043586B2 patent drawing

AI summary

A shift register includes a pulling-up unit, a pulling-down unit and an output unit, the pulling-up unit being connected to a first input terminal, a first clock signal terminal, a first level terminal, a pulling-down node and a pulling-up node, respectively, the pulling-down unit being connected to a second input terminal, a second level terminal, the first level terminal, the pulling-up node and the pulling-down node, respectively, and the output unit being connected to the first level terminal, a second clock signal terminal, an output terminal, the pulling-down node and the pulling-up node, respectively. The shift register provides an output signal through the output terminal according to the signals inputted from the first input terminal, the second input terminal, the first level terminal, the second level terminal, the first clock signal terminal and the second clock signal terminal.