Shift Register Clock Segmentation for Lower Parasitic Load

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In driver circuits utilizing unipolar TFTs, the signal strength decreases or increases by the same amount as the threshold voltage of the TFT, leading to increased power consumption due to parasitic capacitance, especially in inverted staggered TFTs.

Innovation Solution

The problem is addressed by dividing the clock signal line in a shift register into multiple pulse signal lines, with each flip-flop connected to a separate pulse signal line, reducing the capacity load and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single clock signal line is used in a shift register, then the circuit structure is simple, but the power consumption increases due to large parasitic capacitance

Engineering Contradiction:
Improvecircuit structureVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent divides a single clock signal line into multiple separate clock signal lines (first clock signal line, second clock signal line, third clock signal line, fourth clock signal line). Each flip-flop is connected to a different clock signal line, which reduces the total parasitic capacitance on each line and thereby reduces power consumption while maintaining the shift register functionality

Inventive Principle:
Principle #1Segmentation

2Power

If the gate width of TFT is increased to handle heavy load, then the driving capability is improved, but the parasitic capacitance becomes larger

Engineering Contradiction:
Improvedriving capabilityVSAvoidparasitic capacitance
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent segments the clock signal distribution into multiple lines, allowing each TFT to drive a smaller capacitive load. This enables the use of TFTs with smaller gate widths while maintaining adequate driving capability, thereby reducing parasitic capacitance and power consumption

Inventive Principle:
Principle #1Segmentation

3Ease of manufacture

If unipolar TFTs are used in driver circuits, then the manufacturing process is simplified, but the signal strength varies by threshold voltage

Engineering Contradiction:
Improvemanufacturing processVSAvoidsignal strength
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent employs bootstrap operation using periodically switching TFTs (first switching TFT, second switching TFT, third switching TFT, fourth switching TFT) that are turned on and off in sequence. This periodic action compensates for the threshold voltage drop in unipolar TFTs, maintaining signal strength while keeping the manufacturing process simple

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS20250063820A1Shift register and display device and driving method thereof
Publication Date: 2025.02.20 SEMICON ENERGY LAB CO LTD
  • US20250063820A1 patent drawing
  • US20250063820A1 patent drawing
  • US20250063820A1 patent drawing

AI summary

The power consumption of a shift register or a display device including the shift register is reduced. A clock signal is supplied to a shift register by a plurality of wirings, not by one wiring. Any one of the plurality of wirings supplies a clock signal in only part of the operation period of the shift register, not during the whole operation period of the shift register. Therefore, the capacity load caused with the supply of clock signals can be reduced, leading to reduction in power consumption of the shift register.