Shift Register Unit Clock Signal Selection for 3D Display Crosstalk

Solution Overview

Problem

3D shutter-type display technology faces challenges with crosstalk due to liquid crystal response time, requiring high frame rates and complex gate integrated circuit designs, which increase design difficulty and system complexity.

Innovation Solution

A shift register unit and gate driving circuit with a clock signal selection sub-circuit that allows for switching between 2D and 3D display modes, reducing scanning frequency and minimizing the impact of high-frequency signals on the display panel by using switching transistors controlled by specific voltage levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high frame rate driving is adopted to reduce crosstalk in 3D shutter-type display, then crosstalk is reduced, but charge saturation of the liquid crystal panel occurs and design complexity increases

Engineering Contradiction:

Improvecrosstalk reductionVSAvoidgate integrated circuit design complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The gate driving circuit is divided into multiple stages with each stage independently controllable. The first and second stages can be independently enabled or disabled through control signals, allowing the circuit to operate in different modes (2D single-stage, 3D two-stage, or disabled) without requiring complete redesign of the entire gate driving circuit.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The gate driving circuit incorporates dynamic control capabilities where the operating mode can be switched in real-time based on display requirements. Control signals dynamically enable or disable specific stages and clock signal selection, allowing adaptation between 2D and 3D modes without fixed hardware constraints.

Inventive Principle:

Principle #15Dynamics

2Reliability

If high frame rate driving is adopted to reduce crosstalk in 3D shutter-type display, then crosstalk is reduced, but the charging impact on the display panel increases

Engineering Contradiction:

Improvecrosstalk reductionVSAvoidcharging impact on display panel

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The gate driving circuit is divided into multiple stages with each stage independently controllable. The first and second stages can be independently enabled or disabled through control signals, allowing the circuit to operate in different modes (2D single-stage, 3D two-stage, or disabled) without requiring complete redesign of the entire gate driving circuit.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The circuit uses periodic clock signals with different frequencies for different operating modes. In 3D mode, two different clock frequencies can be selected through the clock signal selection circuit, enabling periodic gate line scanning that reduces charging impact while maintaining crosstalk reduction benefits.

Inventive Principle:

Principle #19Periodic action

3Productivity

If clock signal frequency is increased to achieve higher frame rate, then frame rate is improved, but the impact on liquid crystal charging increases

Engineering Contradiction:

Improveframe rateVSAvoidliquid crystal charging impact

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The gate driving circuit incorporates dynamic control capabilities where the operating mode can be switched in real-time based on display requirements. Control signals dynamically enable or disable specific stages and clock signal selection, allowing adaptation between 2D and 3D modes without fixed hardware constraints.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The circuit allows dynamic change of clock signal frequency parameters based on operating mode. In 3D mode, the clock signal selection circuit can choose between different clock frequencies, enabling the system to use higher frequencies only when necessary for achieving the required frame rate, thereby reducing overall charging impact on the liquid crystal panel.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10872578B2Shift register unit, gate driving circuit and driving method thereof

Publication Date: 2020.12.22 BOE TECHNOLOGY GROUP CO LTD

AI summary

A shift register unit and a driving method thereof, a gate driving circuit, and an array substrate are provided, and the shift register unit includes: an input sub-circuit connected between a signal input terminal and a pull-up node, an output sub-circuit connected between the pull-up node and a signal output terminal; a reset sub-circuit connected between a reset terminal, the pull-up node and the signal output terminal; and a clock signal selection sub-circuit having input terminals connected to a first clock signal terminal and a second clock signal terminal, and a first output terminal connected to the output sub-circuit, and for selecting to provide either a first clock signal or a second clock signal to the output sub-circuit according to voltage levels at the first control terminal and the second control terminal.