Shift Register Clock Signal Timing for Power Reduction
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Solution Overview
Problem
In driver circuits with unipolar transistors, the voltage of output signals decreases or increases by the same amount as the transistor's threshold voltage, leading to increased parasitic capacitance and power consumption due to bootstrap operations.
Innovation Solution
The use of multiple clock signals with different timing for flip-flops in a shift register allows for more selective operation, reducing power consumption by optimizing the voltage states of clock signals and minimizing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bootstrap operation is performed in a shift register using unipolar transistors, then the output signal voltage can be maintained, but parasitic capacitance increases and power consumption increases
Solution Approach 1:
The shift register is divided into multiple independent flip-flops, each capable of being controlled by different clock signals. This segmentation allows selective operation of individual flip-flops, reducing the need for bootstrap operations across the entire register and thereby reducing parasitic capacitance and power consumption while maintaining output voltage stability in active sections.
Solution Approach 2:
The invention introduces dynamic clock signal control where different clock signals with varying phases and timing are applied to different flip-flops. This dynamic control enables the shift register to adaptively activate only the necessary flip-flops at any given time, reducing overall parasitic capacitance and power consumption while maintaining reliable output signal voltage through proper clock timing.
2Speed
If all flip-flops operate simultaneously in a shift register, then data transmission speed is maintained, but power consumption increases due to increased parasitic capacitance
Solution Approach 1:
Different clock signals are applied periodically to different flip-flops in a phased manner. This periodic action with varying timing allows data to propagate through the shift register in stages rather than all flip-flops switching simultaneously, maintaining effective data transmission speed while reducing the peak parasitic capacitance and power consumption by spreading the switching activity over time.
3Ease of manufacture
If a shift register uses only unipolar transistors, then manufacturing simplicity is maintained, but voltage control becomes limited and bootstrap operations are required
Solution Approach 1:
The invention makes unipolar transistors perform multiple functions by using them in different configurations within the same shift register circuit. Some unipolar transistors function as switching elements controlled by clock signals, while others serve as load elements or voltage level shifters. This multi-functional use of unipolar transistors maintains manufacturing simplicity while achieving the voltage control capabilities previously requiring bipolar transistors or bootstrap circuits.
Data Source
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AI summary
The shift register includes first to fourth flip-flops. A first clock signal which is in a first voltage state in a first period and in a second voltage state in second to fourth periods is input to the first flip-flop. A second clock signal which is in the first voltage state in the second period and in the second voltage state in the third period and the fourth period is input to the second flip-flop. A third clock signal which is in the second voltage state in the first, second, and fourth periods and in the first voltage state in the third period is input to the third flip-flop. A fourth clock signal which is in the second voltage state in the first and second periods and in the first voltage state in the fourth period is input to the fourth flip-flop.