Shift Register Compensation Circuit for Voltage Stability
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Solution Overview
Problem
Traditional LCD devices face performance issues due to coupling effects between clock signals and node voltages in shift registers, leading to voltage fluctuations that affect the stability of gate driving signals.
Innovation Solution
The introduction of a compensation circuit with capacitors coupled to the input circuit, pull-down circuit, and node, utilizing three or four clock signals to maintain stable voltage levels by offsetting fluctuations, thereby reducing the coupling effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional shift register structure is used, then device complexity is reduced, but voltage stability at node Q deteriorates due to coupling effects between clock signals and node voltages
Solution Approach 1:
A compensation circuit is introduced as an intermediary component between the clock signals and the node Q. This compensation circuit includes a compensation transistor and compensation capacitor that mediate the coupling effect by providing a counteracting signal to offset the voltage fluctuations caused by clock signal coupling, thereby stabilizing the node voltage without fundamentally changing the basic shift register structure
Solution Approach 2:
The compensation circuit applies preliminary anti-action by generating a compensating voltage signal in advance that opposes the harmful coupling effect. The compensation transistor is configured to activate before or during the coupling effect occurs, producing a counter-signal that prevents the voltage fluctuation from significantly affecting node Q, thus preemptively counteracting the harmful effect
2Reliability
If more clock signals are used for compensation, then voltage stability improves, but device complexity increases
Solution Approach 1:
The compensation circuit achieves multi-functionality by using the existing clock signals (CLK1 and CLK2) for dual purposes: their primary function of driving the shift register operation and their secondary function of being processed through the compensation circuit to generate stabilizing effects. This allows the same clock signals to serve multiple functions without adding independent compensation clock signal sources
Solution Approach 2:
The system applies self-service by having the existing clock signals and circuit components serve the additional function of voltage compensation. The compensation circuit utilizes the inherent characteristics of the existing clock signals CLK1 and CLK2, along with available transistors and capacitors in the circuit, to automatically compensate for voltage fluctuations without requiring external intervention or additional dedicated compensation resources
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution stabilizes the voltage levels at the node, enhancing the reliability of gate driving signals and reducing noise resistance in LCD devices, resulting in improved performance and simplicity of structure.
Implementation Method 1
a compensation circuit coupled to the input circuit, the first pull-down circuit and the node for maintaining the voltage level of the node according to the second or a third clock signal
Data Source
AI summary
A shift register has a plurality of shift register units coupled in series. Each shift register includes a pull-up circuit, an input circuit, a pull-down circuit, a compensation circuit, an input end, an output end and a node. Each shift register unit receives an input voltage at the input end and provides an output voltage at the output end. The input circuit transmits the input voltage to the node based on a first clock signal. The pull-up circuit provides the output voltage based on a second clock signal and the voltage level of the node. The pull-down circuit selectively connects the node with the output end according to a third clock signal. The compensation circuit is coupled to the input circuit, the pull-down circuit and the node for maintaining the voltage level of the node based on the second and third clock signals.