Shift Register Control for AMOLED External Compensation Sensing
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Solution Overview
Problem
Existing gate drive circuits for AMOLED panels face challenges in supporting random external compensation sensing during the blank period due to continuous and sequential output of black insertion drive signals, preventing some pixel rows from receiving the necessary light emitting drive signals.
Innovation Solution
A shift register design that allows independent control of light emitting control signals, enabling a first shift register to output light emitting drive signals during the blank period for pixel rows needing external compensation sensing, while maintaining normal operation of cascaded shift registers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the gate drive circuit continuously and sequentially outputs black insertion drive signals, then the sequential operation of cascaded shift registers is maintained, but pixel rows cannot receive light emitting drive signals during blank period for external compensation sensing
Solution Approach 1:
The shift register circuit employs dynamic control signals (RESET signal, LIGHT_EMITTING control signal) that can change the operating state of the circuit during different time periods. During normal operation, the circuit operates in sequential mode; during blank period, the RESET signal enables independent control mode, allowing the circuit to adapt its behavior dynamically based on timing requirements
Solution Approach 2:
The circuit uses a LIGHT_EMITTING control signal that is prepared in advance during the blank period to ensure that light emitting drive signals are ready to be output when needed for external compensation sensing, rather than waiting for the sequential cascade to naturally progress
2Reliability
If the shift register outputs light emitting drive signals independently during blank period, then pixel rows can perform external compensation sensing, but the continuous sequential output of black insertion drive signals is interrupted
Solution Approach 1:
The gate drive circuit operates in periodic cycles, alternating between normal sequential operation mode and blank period independent output mode. The RESET signal is periodically activated during blank periods to enable independent light emitting signal output, while maintaining sequential operation during active display periods, creating a rhythmic pattern of operation that satisfies both requirements
3Device complexity
If cascaded shift registers operate in normal sequential mode, then the gate drive circuit structure is simple, but some pixel rows cannot receive necessary drive signals for external compensation sensing
Solution Approach 1:
The shift register circuit is designed with multi-functionality: it can operate in two modes - normal sequential cascade mode for regular display operation, and independent output mode during blank periods for external compensation sensing. The same hardware structure (shift register, transistors, capacitors) serves both purposes through controlled switching via RESET and LIGHT_EMITTING signals, eliminating the need for separate dedicated circuits for each function
Data Source
AI summary
Embodiments of the present disclosure provide a shift register, a gate drive circuit and a display device. The shift register includes a light emitting drive output module configured to supply a first voltage of a first power supply terminal to a light emitting control drive signal output terminal in response to control of a voltage at a third node, to supply a second voltage of a second power supply terminal to the light emitting control drive signal output terminal in response to control of a voltage at a second node, and to supply a second voltage of a second power supply terminal to the light emitting control drive signal output terminal in response to control of the second voltage at the second power supply terminal.