Shift Register Control for Image Signal Readout Delay
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Solution Overview
Problem
Existing image processing devices with MOS solid-state image-pickup devices struggle to achieve timely and appropriate image output without delay, especially when conditions such as shutter speed or frame rate change, due to inadequate control over signal reading and clearing processes.
Innovation Solution
An image processing device with a first shift register for reading out an image signal and a second shift register for clearing residual carriers, along with an output circuit that manages shift data based on the number of lines and image pickup conditions, ensuring appropriate image output without delay by inhibiting unnecessary signal selection when conditions change.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of lines between the reading-out line and clearing line is increased to handle longer accumulation periods, then the image pickup adaptability improves, but the delay in image output increases
Solution Approach 1:
The patent applies dynamics by making the shift register operation conditional rather than fixed. The control circuit dynamically adjusts whether to operate the first shift register based on real-time comparison between the actual line difference and the required line difference, allowing the system to adapt its behavior to current imaging conditions and minimize delay while maintaining proper clearing sequence.
Solution Approach 2:
The patent changes the operational parameter of the shift register from a fixed state to a variable state controlled by the comparison result. When the line difference exceeds the required threshold, the system changes its operation mode by inhibiting the first shift register, thereby optimizing the balance between adaptability and output timing.
2Productivity
If the first shift register is always operated to read out image signals, then the image output speed improves, but the image quality deteriorates due to incorrect line selection
Solution Approach 1:
The patent implements feedback control by using the control circuit to continuously monitor the line difference and compare it with the required line difference. This feedback mechanism determines whether the first shift register should operate, ensuring that image signals are only read out when the clearing operation is properly synchronized, thus maintaining both speed and quality.
Solution Approach 2:
The system performs a preliminary check by comparing line differences before enabling the readout operation. This preliminary action ensures that the clearing line is correctly positioned relative to the reading-out line, preventing premature or incorrect image signal readout that would compromise quality.
3Loss of time
If the shift register operation is inhibited to prevent delays, then the image output timing improves, but the adaptability to different accumulation periods worsens
Solution Approach 1:
The patent changes the operational parameter of the shift register from a fixed state to a variable state controlled by the comparison result. When the line difference exceeds the required line difference, the system changes its operation mode by inhibiting the first shift register, thereby optimizing the balance between adaptability and output timing.
Solution Approach 2:
The patent applies dynamics by making the shift register operation conditional rather than fixed. The control circuit dynamically adjusts whether to operate the first shift register based on real-time comparison between the actual line difference and the required line difference, allowing the system to adapt its behavior to current imaging conditions and minimize delay while maintaining proper clearing sequence.
Data Source
AI summary
An image processing device and method are provided. In a method of reading an image signal from a solid-state image-pickup element where a plurality of unit pixels including a transistor for detecting a light signal and a photo diode are arranged in a matrix, shift data applied to a line for reading out an image signal, which outputs a signal for selecting a line for reading out an image signal, is output to a shift register connected to a line for reading out an image signal, when the number of lines between line for reading out an image signal and line for clearing an image signal are equal to or less than the number of lines in the matrix and the condition for picking an image up is changed.