Shift Register Control Circuit for LCD Residual Charge Release
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Solution Overview
Problem
Conventional shift registers in LCD panels require an external power source to release residual charges, which degrades circuit performance if the clear signal timing is not precisely managed, especially during frame signal input.
Innovation Solution
A control circuit using internal clock signals to control the on/off states of transistors in shift register stages, enabling residual charge release during frame signal input without an external power source, by utilizing output signals from preceding stages as clear signals, thus minimizing charge coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an external power source is used to provide clear signal for releasing residual charges, then the residual charges can be released, but the circuit performance degrades and additional power source is required
Solution Approach 1:
The patent merges the clear signal generation function into the shift register circuit itself by using the output signal from a preceding stage as the clear signal for the current stage. This eliminates the need for external power sources and separate clear signal generation circuits, thereby reducing device complexity while maintaining the residual charge release function.
Solution Approach 2:
The shift register circuit serves itself by using its own internal output signals to generate clear signals for charge release. Each stage's output signal is utilized to clear the next stage, creating a self-sustaining system that does not require external intervention for residual charge management.
2Object-generated harmful factors
If the clear signal timing is close to the output signal timing, then the charge coupling is reduced, but the circuit performance of last stage is degraded
Solution Approach 1:
The patent applies preliminary action by releasing residual charges in advance before the output signal is generated. The clear signal is activated during the blanking time period, which is before the frame signal input period, ensuring that charge coupling is minimized before it can affect the output signal quality.
Solution Approach 2:
The patent utilizes periodic action by synchronizing the clear signal timing with the periodic frame signal input. The clear signal is enabled during the blanking time between frames, creating a periodic charge release pattern that aligns with the display refresh cycle, thereby preventing charge coupling while maintaining circuit performance.
Data Source
AI summary
A control circuit includes a plurality of shift register stages. Each shift register stage is capable of outputting an individual output signal. The output signal is utilized to be a driving signal of next shift register stages. Each shift register stage comprises a transistor for receiving a clear signal CLR. The residual charges of the shift register stage can be released when the clear signal CLR is in a high voltage level. The clear signal CLR is enabled during a non-blanking time of a liquid crystal display (LCD). Each current register stage can use an output signal of another shift register stage which is apart from the current shift register stage by a predetermined interval as the clear signal CLR. The clear signal CLR is used to release the residual charges of the shift register stage before the shift register stage outputs its own output signal.