Shift Register Unit DC Loss Reduction via Dynamic Node Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing gate drive circuits in displays suffer from continuous DC loss due to direct electrical connections between high and low voltage terminals, leading to increased energy consumption as usage frequency and duration increase.

Innovation Solution

A shift register unit with specific subcircuits and control units that manage voltage levels and connections between DC voltage terminals, preventing direct DC paths and reducing DC loss by using transistors and capacitors to control node voltages and signal levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high voltage DC terminal and low voltage DC terminal are electrically connected to directly form a DC path during operation, then the gate drive circuit can operate normally, but DC loss occurs continuously causing increased energy consumption

Engineering Contradiction:
Improvegate drive circuit operationVSAvoidDC power consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies dynamics by making the DC path conditional rather than fixed. The second node control subcircuit dynamically connects or disconnects the second node from DC voltage terminals based on signal levels. When scan pulse signal or output signal is at first level, the second node connects to second level DC voltage terminal; when both signals are at second level and second clock signal is at predetermined level, the second node connects to first level DC voltage terminal. This dynamic connection prevents continuous DC loss while maintaining operational reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces an intermediary mechanism through the second node control subcircuit and second node. Instead of direct electrical connection between high and low voltage terminals, the control subcircuit acts as a mediator that selectively connects nodes to appropriate voltage terminals based on operational state. This intermediary structure eliminates direct DC paths while ensuring proper voltage supply during operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If direct DC path is formed between high and low voltage terminals, then circuit operation is simplified, but energy consumption increases with usage frequency and working hours

Engineering Contradiction:
Improvecircuit connection structureVSAvoidenergy consumption
Core Design Contradiction:
Device complexityVSUse of energy by stationary object

Solution Approach 1:

The circuit connection structure is transformed from static direct connection to dynamic conditional connection. The second node control subcircuit evaluates signal levels and dynamically switches connections accordingly. This dynamic approach prevents continuous DC loss while maintaining operational simplicity through automated control based on signal states.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The control subcircuit performs self-service by automatically detecting signal levels and initiating appropriate connections without external intervention. When scan pulse signal or output signal reaches first level, or when both are at second level with second clock signal at predetermined level, the corresponding connections are automatically established. This self-service mechanism eliminates the need for complex external control while preventing energy loss.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10096375B2Shift register unit and driving method thereof, gate drive circuit, display device
Publication Date: 2018.10.09 BOE TECHNOLOGY GROUP CO LTD
  • US10096375B2 patent drawing
  • US10096375B2 patent drawing
  • US10096375B2 patent drawing

AI summary

A shift register unit comprises an input subcircuit for a first node to be a first level when a scan pulse is of the first level, an output subcircuit for driving an output terminal to be a first clock signal level when the first node is at the first level, a second node control subcircuit for connecting the second node with a second level when either of the scan pulse and the output terminal is of the first level, and connecting the second node with the first level when each of the scan pulse and the output signal is of the second level, a first reset subcircuit for driving the first node to be the second level when the second node is at the first level, and a second reset subcircuit for driving the output signal to be the second level when the second node is at the first level.