Shift Register Unit DC Power Supply Parasitic Capacitance
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Solution Overview
Problem
Existing shift register units in display technology face challenges in reducing power consumption and ensuring reliable operation due to high parasitic capacitance and signal frequency dependencies.
Innovation Solution
The proposed shift register unit includes an input circuit, an output circuit, and a pull-down circuit, with the output circuit coupled to a DC power supply, reducing power consumption by eliminating signal frequency effects and utilizing transistors with optimized width-to-length ratios to minimize parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the output circuit is coupled to an AC power supply, then the shift register unit can operate with clock signals, but power consumption increases due to signal frequency effects
Solution Approach 1:
The patent changes the power supply parameter from AC to DC, eliminating frequency-dependent power consumption. The output circuit is coupled to a DC power supply terminal instead of an AC power supply, which removes the signal frequency effect that causes increased power consumption in conventional designs.
2Reliability
If conventional transistor designs are used, then the circuit is easier to manufacture, but parasitic capacitance increases reducing operational reliability
Solution Approach 1:
The patent optimizes the transistor width-to-length ratio parameter to minimize parasitic capacitance. By adjusting this geometric parameter, the design achieves lower parasitic capacitance while maintaining manufacturability through standard transistor fabrication processes.
Solution Approach 2:
The patent applies different width-to-length ratios to different transistors within the circuit based on their specific functional requirements. The output circuit uses transistors with optimized ratios to minimize parasitic capacitance, while other circuits may use different ratios suited to their functions.
3Productivity
If the output circuit outputs signals at high frequency, then productivity increases, but power consumption increases due to signal frequency effects
Solution Approach 1:
The patent changes the power supply mode to DC, which eliminates the direct proportionality between signal frequency and power consumption. This allows the circuit to operate at high frequencies for improved productivity without the penalty of increased power consumption that would occur with AC power supply.
Data Source
AI summary
Provided are a shift register unit, a driving method, a gate drive circuit and a display device in the field of display technology. The shift register unit includes an input circuit, an output circuit, and a first pull-down circuit. The output circuit is coupled to a first clock signal terminal, a first node, a first DC power supply terminal, and a first output terminal respectively, and configured to output a first power supply signal from the first DC power supply terminal to the first output terminal in response to a potential of the first node and a first clock signal provided by the first clock signal terminal.