Shift Register Unit DC Pull-Down Noise Suppression
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Solution Overview
Problem
The existing gate driving circuits in TFT-LCDs suffer from interference noise due to alternating current clock signals, which affects signal output stability and require a large number of thin film transistors, resulting in a bulky display.
Innovation Solution
A shift register unit with a direct current pull-down mode, comprising an input module, reset module, output module, pull-down control module, and pull-down module, using a reduced number of thin film transistors to suppress noise and enhance stability, while minimizing the size of the shift register unit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If alternating current clock signals are used in the gate driving circuit, then the shift register unit can operate, but interference noise occurs which affects signal output stability
Solution Approach 1:
The patent extracts and removes the AC clock signal from the circuit by introducing a DC clock signal instead. The DC clock signal terminal provides a stable DC voltage that eliminates the alternating current component responsible for interference noise, thereby improving signal output stability without affecting the operational functionality of the shift register unit.
Solution Approach 2:
The patent changes the parameter of the clock signal from alternating current (AC) to direct current (DC). This parameter change transforms the clock signal characteristics to eliminate interference noise while maintaining the necessary timing functionality. The DC clock signal provides a stable voltage level that prevents the noise generation associated with AC signals.
2Reliability
If a greater number of thin film transistors are used to achieve the output and resetting functions, then the shift register unit can function properly, but the wiring space increases causing a large size
Solution Approach 1:
The patent merges multiple transistor functions into fewer transistors by introducing a DC clock signal that eliminates the need for certain resetting and timing transistors. The DC clock signal's stable voltage level allows combination of functions that previously required separate AC-clocked transistors, thereby reducing the total transistor count and wiring space while maintaining full functionality.
Solution Approach 2:
The patent changes the clock signal parameter from AC to DC, which fundamentally alters the transistor operation requirements. The DC signal's constant voltage level enables simpler transistor configurations that require fewer components to achieve the same output and resetting functions, thus reducing wiring space and overall circuit size.
Data Source
AI summary
The present disclosure relates to the technical field of communication. There is provided a shift register unit and a gate driving circuit for decreasing noise interferences, enhancing stability of the shift register unit, and at the same reducing the size of the shift register unit. The shift register unit comprises: an input module configured to provide a first voltage signal to an output terminal in response to an input signal; a reset module configured to provide a second voltage signal to a first node as an output terminal of the input module in the input module in response to a reset signal; an output module configured to provide a first clock signal to the output terminal in response to a voltage at a first node; a pull-down control module configured to provide a second clock signal to a second node in response to the second clock signal and provide a power supply negative voltage to the second node in response to the voltage at the first node or the voltage at the output terminal; and a pull-down module configured to provide the power supply negative voltage to the first node and the output terminal in response to the voltage at the second node.