Shift Register Compensation Circuit for Low-Delay Display Driving

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Solution Overview

Problem

In active matrix semiconductor display devices, the high power source voltage required for internal circuits due to signal amplitude differences between internal and external circuits leads to increased area occupation, signal delay, waveform rounding, and higher power consumption, especially when level shifters are used in external circuits.

Innovation Solution

A shift register with multiple flip-flop circuits, including clocked inverters and compensation circuits, where the timing of signal output is controlled in synchronization with outputs from two stages before, reducing signal delay and waveform distortion while maintaining normal operation with lower clock signal amplitudes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a level shifter is provided in the internal circuit to amplify signal amplitude, then the internal circuit can operate normally, but the internal circuit occupies larger area and signal is delayed and waveform is rounded

Engineering Contradiction:
Improvenormal operation of internal circuitVSAvoidarea of internal circuit
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the level shifting function from the internal circuit and relocates it to the external circuit. The external circuit is modified to operate at high voltage and provide level-shifted signals, while the internal circuit maintains its original low-voltage operation without requiring additional level shifting components, thereby reducing internal circuit area.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a buffer circuit as an intermediary between the external high-voltage circuit and the internal low-voltage circuit. This buffer performs the level shifting function and isolates the internal circuit from high-voltage signals, allowing the internal circuit to operate normally with reduced area while still receiving properly level-shifted signals.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a level shifter is provided in the internal circuit to amplify signal amplitude, then the internal circuit can operate normally, but signal delay and waveform rounding occur

Engineering Contradiction:
Improvenormal operation of internal circuitVSAvoidsignal delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The level shifting function is extracted from the internal circuit and performed in the external circuit before signals enter the internal circuit. This eliminates the need for internal level shifters that would introduce signal delay and waveform distortion, allowing signals to be transferred more quickly and accurately.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs level shifting in advance in the external circuit before signals are input to the internal circuit. By pre-adjusting signal levels externally, the internal circuit receives signals that are already at the appropriate voltage levels, eliminating the need for additional signal conditioning that would cause delay.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If level shifters are provided in external circuit to amplify signal, then internal circuit can operate, but housing must be formed larger and cost increases

Engineering Contradiction:
Improveoperation of internal circuitVSAvoidhousing size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies different voltage levels to different parts of the system: the external circuit operates at high voltage for efficient signal driving, while the internal circuit operates at low voltage for compact integration. This localized voltage assignment allows the internal circuit to be smaller without requiring the entire housing to be enlarged for high-voltage components.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The high-voltage operation is extracted and confined to the external circuit only, while the internal circuit maintains low-voltage operation. This separation allows the internal circuit to be compact and integrated, reducing overall housing size while still achieving the necessary signal amplification externally.

Inventive Principle:
Principle #2Taking out (Extraction)

4Reliability

If signal is amplified in external circuit, then internal circuit can operate, but high power source voltage must be supplied to external circuit leading to increased power consumption

Engineering Contradiction:
Improveoperation of internal circuitVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent applies high voltage only locally in the external circuit where it is needed for signal driving, while the internal circuit operates at low voltage for efficient power consumption. This localized high-voltage application minimizes overall power consumption compared to supplying high voltage throughout the entire system.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The high-power voltage requirement is extracted and isolated to the external circuit only. The internal circuit operates independently at low voltage with low power consumption, while the external circuit handles the high-power signal amplification needs, optimizing the overall power efficiency of the system.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7602215B2Shift register and semiconductor display device
Publication Date: 2009.10.13 SEMICON ENERGY LAB CO LTD
  • US7602215B2 patent drawing
  • US7602215B2 patent drawing
  • US7602215B2 patent drawing

AI summary

The invention provides a shift register which can operate normally while suppressing a delay of signal and a rounding of waveform. The shift register of the invention includes a plurality of stages of flip-flop circuits each of which includes a clocked inverter. The clocked inverter includes a first transistor and a second transistor which are connected in series, a first compensation circuit including a third transistor and a fourth transistor which are connected in series, and a second compensation circuit including a fifth transistor and a transmission gate. According to the first compensation circuit, a timing at which a signal outputted from the flip-flop circuit rises or falls can be controlled in synchronization with an output of two stages before. The second compensation circuit can control a clock signal input can be controlled.