Shift Register Pull-Up Down Point Discharge Control

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Solution Overview

Problem

The existing gate driver circuits in display technology face issues with insufficient discharge at pull-up and pull-down points, leading to abnormal display images due to inadequate signal transmission through shift registers.

Innovation Solution

The implementation of a shift register design that includes multiple control circuits for pull-up and pull-down points, utilizing transistors and capacitors to ensure simultaneous and efficient connection to voltage inputs under controlled signals, thereby ensuring full discharge and maintaining normal display.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional shift register design is used, then the device complexity is reduced, but the discharge performance at pull-up and pull-down points becomes insufficient

Engineering Contradiction:
Improvedischarge performanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The shift register circuit is segmented into multiple independent control circuits: a first pull-down control circuit, a second pull-down control circuit, a first pull-up control circuit, and a second pull-up control circuit. Each circuit independently controls specific nodes (pull-up or pull-down points) to ensure complete discharge and charge operations, thereby resolving the discharge performance issue while maintaining manageable complexity through modular design.

Inventive Principle:
Principle #1Segmentation

2Speed

If the number of control circuits is increased to improve discharge performance, then the discharge speed increases, but the manufacturing precision requirements become more stringent

Engineering Contradiction:
Improvedischarge speedVSAvoidcircuit fabrication precision
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The control circuits are designed to activate pull-up and pull-down operations at predetermined timing cycles. The first and second control circuits for each node are enabled at specific moments to ensure complete discharge before the next charging operation, guaranteeing adequate discharge speed without requiring excessively tight manufacturing tolerances.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If multiple control circuits are implemented, then the signal transmission completeness improves, but the ease of manufacture deteriorates

Engineering Contradiction:
Improvesignal transmission completenessVSAvoidcircuit assembly ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The control circuits are designed with universal functionality where each circuit (first pull-down, second pull-down, first pull-up, second pull-up) can independently control its designated nodes. This multi-functional design ensures complete signal transmission through redundant control paths while maintaining ease of manufacture by using standardized circuit blocks that can be replicated across the shift register stages.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10997890B2Shift register, a gate driver circuit and a display device
Publication Date: 2021.05.04 BEIJING BOE TECH DEV CO LTD
  • US10997890B2 patent drawing
  • US10997890B2 patent drawing
  • US10997890B2 patent drawing

AI summary

Disclosed herein is a shift register, a grid driver circuit and a display device. The shift register may comprise a first pull-down point control circuit having a control end coupled to a pull-up point and two ends coupled to a pull-down point and a first voltage input respectively, a second pull-down point control circuit having two control ends coupled to an input signal and a control input respectively and two ends coupled to the pull-down point and the first voltage input respectively, a first pull-up point control circuit having a control end coupled to the pull-down point and two ends coupled to the pull-up point and the first voltage input respectively, and a second pull-up point control circuit having a control end coupled to a first clock signal and two ends coupled to the pull-up point and the first voltage input respectively.