Shift Register with Dual Discharge Voltages for Scan Pulse Falling Edge
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Solution Overview
Problem
Conventional shift registers in liquid crystal display (LCD) devices face issues with increased size due to prolonged falling edge time of scan pulses, leading to distorted waveforms and erroneous image display, which cannot be resolved by simply increasing the size of output switching elements without enlarging the shift register and display apparatus.
Innovation Solution
A shift register design that divides the output unit into a carry output unit and a scan output unit, using different discharge voltages to prevent lengthening of scan pulses, with a node controller managing voltages across these units to reduce leakage current and falling edge time, allowing for smaller pull-up switching elements and a reduced overall size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the size of output switching elements is increased to reduce falling edge time of scan pulses, then the falling edge time is reduced, but the size of the shift register and display apparatus is increased
Solution Approach 1:
The output unit of each stage is divided into a carry output unit and a scan output unit. The carry output unit outputs carry pulses to adjacent stages, while the scan output unit outputs scan pulses to gate lines. This segmentation allows independent optimization of each output unit, enabling the scan output unit to use smaller switching elements while maintaining fast falling edge performance through dedicated discharge voltage control.
Solution Approach 2:
Different discharge voltages are applied to different output units: a first discharge voltage is applied to the carry output unit and a second discharge voltage (higher than the first) is applied to the scan output unit. This local quality differentiation allows the scan output unit to achieve faster discharge and shorter falling edge time with smaller switching elements, while the carry output unit uses lower voltage appropriate for its function.
2Reliability
If the size of output switching elements is increased to maintain scan pulse waveform integrity, then waveform distortion is prevented, but the size of the display apparatus is increased
Solution Approach 1:
The invention changes the voltage parameter by introducing a second discharge voltage that is higher than the first discharge voltage, specifically for the scan output unit. This parameter change enables the scan output unit to maintain strong discharge capability and waveform integrity while using smaller switching elements, thus preventing waveform distortion without increasing device size.
3Manufacturing precision
If the falling edge time of scan pulses is reduced to prevent erroneous image display, then image quality is improved, but the size of output switching elements must be increased
Solution Approach 1:
By segmenting the output unit into carry and scan output units, the invention allows the scan output unit to be optimized specifically for fast discharge performance. The dedicated scan output unit with higher discharge voltage can achieve short falling edge time and prevent erroneous image display while maintaining a compact size, avoiding the need to increase the size of all switching elements.
Data Source
AI summary
A shift register for reducing size of a display apparatus through a reduction in falling edge time of a scan pulse. The shift register includes stages for sequentially outputting carry pulses and scan pulses. Each stage includes a carry output unit for generating a carry pulse, based on a first discharge voltage and a clock pulse having a low-level voltage with a level substantially equal to the first discharge voltage, and supplying the carry pulse to at least one of an upstream stage and a downstream stage, a scan output unit for generating a scan pulse, based on a second discharge voltage having a higher voltage value than the first discharge voltage and the clock pulse, and supplying the scan pulse to a corresponding gate line, and a node controller for controlling voltages at nodes connected to the carry output unit and the scan output unit.