Shift Register Circuitry for Narrow Frame Displays
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Solution Overview
Problem
Existing shift register circuits for liquid crystal displays face challenges in achieving high resolution and narrow frames while maintaining low power consumption and a simple structure, particularly in reducing noise voltage and improving yield rates.
Innovation Solution
The proposed shift register circuitry includes two shift register units sharing a pull-down sub-circuit and a storage sub-circuit, which maintains the potential of the pull-down node, allowing continuous discharge and reducing noise voltage, thereby reducing the number of transistors and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If traditional shift register circuits are used in liquid crystal displays, then the display can achieve basic driving functions, but the frame width increases and resolution decreases
Solution Approach 1:
The patent merges two shift register units into a single integrated circuit structure that shares common components including the pull-down sub-circuit, storage sub-circuit, and control logic. This consolidation reduces the overall occupation area and enables narrower frame width while maintaining high resolution display capabilities
Solution Approach 2:
The shared pull-down sub-circuit and storage sub-circuit serve multiple functions: they control both shift register units, maintain signal potentials, and enable noise reduction for both units simultaneously. This multi-functionality reduces the total component count and occupation area
2Loss of energy
If traditional shift register circuits are used, then basic signal driving is achieved, but power consumption increases
Solution Approach 1:
By merging the pull-down control logic and storage functions into shared sub-circuits that serve both shift register units, the patent reduces the total number of active components and their associated power consumption while maintaining signal stability through the shared storage sub-circuit
Solution Approach 2:
The storage sub-circuit automatically maintains the potential of the pull-down node without requiring external intervention, and the shared control logic self-regulates the driving signals for both units, reducing overall power consumption while ensuring reliable operation
3Object-affected harmful factors
If traditional shift register circuits are used, then signal transmission is achieved, but noise voltage increases
Solution Approach 1:
The shared storage sub-circuit acts as an intermediary that stabilizes the potential of the pull-down node, preventing noise voltage fluctuations from affecting both shift register units. This intermediary storage function filters out noise and ensures clean signal transmission
Solution Approach 2:
The circuit employs feedback mechanisms where the storage sub-circuit continuously monitors and maintains the pull-down node potential, and the shared control logic adjusts driving signals based on the state of both shift register units, thereby reducing noise voltage and improving yield rate
4Device complexity
If separate pull-down circuits are used for each shift register unit, then signal control is precise, but device complexity increases
Solution Approach 1:
The patent combines the pull-down control functions for both shift register units into a single shared pull-down sub-circuit with common control logic, significantly reducing device complexity while maintaining manufacturing precision through the unified control mechanism
Solution Approach 2:
The shared pull-down sub-circuit is designed to universally control both shift register units through common control signals and integrated logic, achieving precise signal control for both units without requiring separate dedicated circuits, thus reducing overall complexity
Data Source
AI summary
The present disclosure provides a shift register circuitry, a gate driving circuit, and a display device. The shift register circuitry of the present disclosure includes a first shift register unit, a second shift register unit, a pull-down control sub-circuit (20), and a pull-down sub-circuit (30); wherein the first shift register unit includes a first input Sub-circuit (11), a first output sub-circuit (12), a first reset sub-circuit, and a first noise reduction sub-circuit (14); a second shift register unit includes a second input sub-circuit (21), a second output sub-circuit (22), a second reset sub-circuit and a second noise reduction sub-circuit (24).


