Shift Register Unit for Display Drive Circuit Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing shift register designs in display drive technology suffer from high power consumption due to transient DC paths, which increase power consumption and reduce reliability, especially as display panel sizes grow.
Innovation Solution
A shift register unit is designed with an input module, processing module, and output module that generates a gate drive signal using clock signals and a frame start signal to control node voltages, eliminating transient DC paths by making the first node voltage lower than the power supply low level during evaluation periods and resetting the second node, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If feedback transistor M4 is connected between output terminal and reset drive transistor M5 to automatically turn off M5, then the shift register can operate with simple structure, but transient DC path exists from VDD to VSS through M5 and M2 increasing power consumption
Solution Approach 1:
The patent applies preliminary action by controlling the voltage of the first node to be lower than the low level of power supply signal before the evaluation period ends. This proactive voltage control ensures that the feedback transistor M4 turns off the reset drive transistor M5 before a DC path can form, thereby eliminating transient current without requiring additional circuit complexity
Solution Approach 2:
The patent implements feedback control by continuously monitoring and adjusting the voltage of the first node based on the evaluation period timing. The control module uses feedback from the clock signals and evaluation period status to dynamically control the TFTs, ensuring the first node voltage remains below the low level threshold to prevent DC path formation while maintaining simple circuit structure
2Productivity
If output terminal is connected with load, then the shift register can drive display elements, but the potential changes relatively slow causing delayed transistor switching and increased transient current
Solution Approach 1:
The patent applies preliminary action by proactively controlling the first node voltage to be lower than the low level before the evaluation period concludes. This advance voltage control ensures timely switching of transistors M4 and M5, eliminating the delay caused by slow output terminal potential changes and preventing transient DC path formation while maintaining drive capability
Solution Approach 2:
The patent introduces a new control dimension by controlling the voltage of an internal node (first node) separately from the output terminal voltage. This dimensional separation allows the internal control node to switch rapidly for timely transistor control while the output terminal maintains its load-driven voltage trajectory, thus eliminating transient current without compromising drive capability
Data Source
AI summary
A shift register unit, gate drive circuit, and display apparatus. The shift register unit comprises: input module for inputting first and second clock signals, frame start signal, high and low voltage signals, the first clock signal is identical with phase-inverted signal of the second clock signal within one frame; a processing module comprising multiple TFTs, for generating gate drive signal according to the first and second clock signals and frame start signal, controlling voltage of first node formed by TFTs lower than the low level of power supply signal during evaluation period of shift register unit, and resetting second node formed by TFTs to cut off transient DC path formed by input terminals of the high and low voltage signals, and at least one TFT in time; an output module for sending gate drive signal generated by the processing module.