Shift Register Unit for Dual-Gate Transistor Driving
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Solution Overview
Problem
Conventional display devices face limitations in reducing the high voltage required for pixel circuits and in efficiently providing gate driving signals to multiple rows of pixel circuits, leading to a low charging rate and increased transistor count, which hinders the achievement of a narrow bezel design.
Innovation Solution
A shift register unit comprising a common circuit and an output circuit that controls a pull-up node to output gate driving signals to both gate electrodes of each driving transistor in at least two rows, reducing the number of transistors needed and allowing for reduced high voltage application, thereby enhancing charging rate and facilitating narrow bezel designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional single-gate TFT is used for pixel circuit driving, then the charging rate is low, but the device structure is simple
Solution Approach 1:
The driving transistor is divided into two independent gate electrodes (first gate electrode and second gate electrode) that can be controlled separately. This segmentation allows independent control of the two gates, enabling the first gate to control channel formation while the second gate controls current magnitude, thereby achieving high-speed driving without increasing overall device complexity
Solution Approach 2:
The dual-gate transistor structure serves multiple functions: the first gate electrode controls channel formation and the second gate electrode controls current magnitude. This multi-functionality allows a single transistor to perform what previously required multiple transistors, improving charging rate while maintaining device simplicity
2Reliability
If one shift register unit is assigned to each row of pixel circuits, then each row receives dedicated driving signals, but the number of transistors increases significantly
Solution Approach 1:
A single shift register unit is designed to control multiple rows of pixel circuits simultaneously through its dual-gate transistor structure. The first and second gate electrodes can independently drive different rows, allowing one shift register unit to replace multiple conventional units, thereby reducing the total transistor count while maintaining reliable gate driving signal provision
Solution Approach 2:
Multiple gate driving functions that previously required separate shift register units are merged into a single dual-gate transistor structure. The first gate electrode and second gate electrode work together to control multiple pixel circuit rows, combining multiple functions into one device and reducing overall circuit complexity
Data Source
AI summary
A shift register unit includes a common circuit and an output circuit. The common circuit is configured to control a potential at a pull-up node under the control of an input end, a resetting end and a first clock signal input end. The output circuit is configured to control 2M gate driving signal output ends to output gate driving signals respectively under the control of the pull-up node, a noise reduction control end and an output control end, where M is an integer greater than 1.


