Shift Register Driving Dual Gate Lines for Noise Reduction
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Solution Overview
Problem
Traditional gate driver circuits in TFT-LCDs can only drive one row of gate lines, requiring a large number of transistors and increasing the complexity and cost, while also experiencing noise issues that affect long-term stability, particularly in the context of achieving narrow bezel and high-resolution displays.
Innovation Solution
A shift register design that can drive two rows of gate lines using a single shift register, reducing the number of transistors and eliminating noise at output ends, achieved through a precharge module, reset module, control module, pull-up modules, and pull-down modules connected to specific voltage sources and signal inputs, allowing for bilateral scanning and improved operation stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If one shift register drives one row of gate lines, then the gate driver circuit can be simply designed, but the number of transistors increases and the circuit cost increases
Solution Approach 1:
The shift register is designed to drive two rows of gate lines simultaneously, making a single shift register perform the function of what would traditionally require two shift registers. This multi-functionality reduces the total number of transistors needed in the gate driver circuit while maintaining the ability to properly drive multiple gate lines.
Solution Approach 2:
The patent combines the driving functions for two rows of gate lines into a single shift register circuit. By merging the output capabilities and sharing common circuit elements between the two output channels, the design reduces overall transistor count while achieving dual-row driving capability.
2Device complexity
If traditional gate driver circuits are used, then the circuit structure is simple, but noise appears at output ends affecting long-term stability
Solution Approach 1:
The patent extracts and removes the noise source from the output end of the shift register by redesigning the output stage. This separation of the noise-generating elements from the signal output path eliminates the harmful noise while preserving the essential driving function, thereby improving long-term operational stability.
Solution Approach 2:
The patent converts the potential harmful noise effect into a beneficial design feature by restructuring the output circuitry. The redesign transforms what would be a noise problem into an opportunity to create a more stable, noise-free output stage that improves reliability without significantly increasing circuit complexity.
3Adaptability or versatility
If more transistors are used to drive multiple gate lines, then the driving capability is improved, but the manufacturing cost increases
Solution Approach 1:
The shift register is designed to drive two rows of gate lines simultaneously, making a single shift register perform the function of what would traditionally require two shift registers. This multi-functionality reduces the total number of transistors needed in the gate driver circuit while maintaining the ability to properly drive multiple gate lines.
Solution Approach 2:
The patent changes the operational parameters of the shift register to enable it to drive multiple output lines efficiently. By modifying the circuit configuration and signal timing parameters, the design achieves enhanced driving capability for multiple gate lines without proportionally increasing the transistor count, thereby reducing manufacturing cost.
Data Source
AI summary
A shift register, a driving method thereof, a gate driver circuit and a display device. The shift register includes: a precharge module, a reset module, a control module, a first pull-up module, a second pull-up module, a first pull-down module and a second pull-down module. The present disclosure can adopt one shift register to drive two rows of gate lines, reduce the number of transistors, reduce the circuit cost, eliminate the noise at output ends of the shift registers, and improve the operation stability.