Shift Register Charging Circuit Using Dual-Gate TFT Segmentation
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Solution Overview
Problem
Amorphous silicon thin-film transistors and organic transistors experience negative threshold voltage shifts, leading to malfunctions in semiconductor devices due to continuous DC biasing, which existing technologies have not adequately addressed.
Innovation Solution
A semiconductor device with a dual-gate transistor configuration, where two transistors are connected in series with their gates connected to each other, preventing the potential condition where the source and drain are at a higher level and the control electrode is at a lower level, thereby preventing negative threshold voltage shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a charging transistor is used to charge the gate node of the output pull-up transistor in a shift register, then the gate node can be charged to the high level, but the threshold voltage of the charging transistor shifts in the negative direction due to continuous DC biasing where the gate potential is lower than both drain and source
Solution Approach 1:
The charging transistor is divided into two transistors connected in series between the power terminal and the gate node. This segmentation ensures that neither transistor experiences continuous DC biasing with gate potential lower than both drain and source, preventing negative threshold voltage shifts while maintaining the ability to charge the gate node to high level.
Solution Approach 2:
An intermediate node is introduced between the two series-connected transistors. This intermediate node acts as a mediator that prevents the continuous DC biasing condition by ensuring that at least one transistor in the series pair always has its gate potential higher than its source potential, thereby preventing negative threshold voltage shifts.
2Stability of the object's composition
If the gate electrode is continuously (dc-) biased with lower potential than both drain and source, then the transistor can maintain a stable off state, but the threshold voltage shifts in the negative direction causing malfunctions
Solution Approach 1:
The charging transistor is segmented into two series-connected transistors, ensuring that the continuous DC biasing condition affecting the entire transistor is avoided. By dividing the transistor, the patent prevents negative threshold voltage shifts while maintaining stable off-state characteristics through proper potential distribution across the series pair.
Solution Approach 2:
The patent implements periodic switching of the two series-connected transistors, where they alternately assume the charging function. This periodic action prevents continuous DC biasing of either transistor with gate potential lower than both drain and source, thereby preventing negative threshold voltage shifts while maintaining stable off-state operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures reliable transistor cutoff and prevents malfunctions by maintaining the gate-to-source voltage at or below zero, significantly reducing threshold voltage shifts and ensuring stable operation.
Implementation Method 1
a capacitive component between the gate and the connection node has a large capacitance value
Data Source
AI summary
A dual-gate transistor formed of two transistors connected in series between a first power terminal and a first node is used as a charging circuit for charging a gate node (first node) of a transistor intended to pull up an output terminal of a unit shift register. The dual-gate transistor is configured such that the connection node (second node) between the two transistors constituting the dual-gate transistor is pulled down to the L level by the capacitive coupling between the gate and second node in accordance with the change of the gate from the H level to the L level.