Shift Register Circuit with Dual Reset for GOA Stability
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Solution Overview
Problem
Current Gate Driver on Array (GOA) circuits in display panels experience transistor high-level bias states for extended periods during frequent on/off operations, leading to display exceptions and reduced stability and service life.
Innovation Solution
A shift register circuit with an input circuit, output circuit, pull-down circuit, first reset circuit, and second reset circuit is designed to manage signal flow and power sources, including a second reset circuit that provides a signal to the first node and signal output terminal during on and off stages, reducing high-level bias times by performing a reset operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the transistor in charge of outputting a gate drive signal and the transistor of the corresponding display area are kept in a high level state to achieve off screen, then the display panel can perform off screen function, but the transistors will be in high level state for a long time during frequent on/off operations, leading to display exceptions and reduced stability
Solution Approach 1:
The reset function is segmented into two independent circuits: the first reset circuit (RST1) that resets the output node during normal operation, and the second reset circuit (RST2) that resets the first node during off stage. This segmentation allows different parts of the circuit to be reset at different times, preventing prolonged high level bias states and improving transistor reliability during frequent on/off operations.
Solution Approach 2:
The second reset circuit is activated during the off stage to preliminarily reset the first node before the next on stage begins. This preliminary action ensures that the transistor does not remain in a high level bias state during the off period, preventing accumulation of bias stress and reducing the risk of display exceptions during subsequent operations.
2Adaptability or versatility
If a related GOA circuit wants to frequently perform an on/off operation for the display panel, then the display panel can respond to user needs, but the transistor in charge of outputting a gate drive signal and the transistor of the corresponding display area will be in a high level state for a long time, causing display exceptions
Solution Approach 1:
The circuit dynamically adjusts the reset timing based on the operation stage. During the on stage, the first reset circuit operates normally. During the off stage, the second reset circuit is activated to reset the first node, creating a dynamic adaptation to frequent on/off operations and preventing display exceptions while maintaining reliability.
3Device complexity
If the first node is not reset during off stage, then the circuit structure remains simple, but the transistor remains in high level state leading to display exceptions
Solution Approach 1:
The circuit uses its own output signal to trigger the reset function. The output node connects to the reset terminal of the first reset circuit, creating a self-service mechanism where the circuit automatically resets itself during normal operation. Additionally, the off-stage reset provides a complementary self-service function during off periods, ensuring reliability without requiring external control circuits.
Data Source
AI summary
The present disclosure relates to a shift register circuit and a drive method thereof, a gate drive circuit, and a display panel. The shift register circuit comprises a second reset circuit, and a reset operation is performed for a first node and a signal output terminal by the second reset circuit during an off stage of the display panel.


