Shift Register Gate Drive Signal Falling Edge Speed
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Solution Overview
Problem
Touch display panels experience horizontal dark stripes due to slow falling edge speeds of gate drive signals, leading to incorrect charging and display defects, particularly after transitioning from touch to display modes.
Innovation Solution
A driving method and circuitry that dynamically adjusts the clock signal and resistance values in the shift register unit of the gate driving circuitry to enhance the falling speed of gate drive signals, specifically by switching potentials and resistance values during the display time period to prevent signal mischarging and restore the state after touch scanning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the panel operates in 120 Hz Report Rate Long H Blank mode after touch scan, then the report rate is improved, but horizontal dark stripes appear due to slow falling edge speed of gate drive signals
Solution Approach 1:
The patent applies dynamics by making the clock signal voltage adjustable based on operating conditions. The gate driving circuitry switches between first and second clock signal voltages depending on whether the display is in display mode or touch scan mode, dynamically adapting the signal characteristics to prevent horizontal stripes while maintaining high report rate operation.
Solution Approach 2:
The patent changes the voltage parameter of the clock signal to resolve the contradiction. By increasing the clock signal voltage from a first voltage level to a second voltage level during touch scan mode, the falling edge speed of gate drive signals is improved, preventing horizontal stripe defects while maintaining the 120 Hz report rate.
2Manufacturing precision
If the clock signal voltage is increased to improve falling edge speed, then the signal charging accuracy is improved, but the power consumption increases
Solution Approach 1:
The patent applies periodic action by alternately switching between first and second clock signal voltages based on the display mode. The higher voltage is applied only during touch scan mode when needed for accurate signal charging, while the lower voltage is used during normal display mode to reduce power consumption, creating a periodic voltage adjustment pattern.
Solution Approach 2:
The gate driving circuitry dynamically adjusts the clock signal voltage level based on operational requirements. The circuit switches between two voltage levels, using the higher voltage only when necessary for touch scan operations to maintain signal accuracy, and the lower voltage during normal display operations to minimize power consumption.
Data Source
AI summary
A driving method, a driving circuitry and a display device are provided. The driving method is applied to a touch display panel. A shift register unit in a gate driving circuitry in the touch display panel is electrically coupled with a clock signal terminal, the clock signal terminal is used for providing a clock signal to a pull-up circuit in the shift register unit, and a display cycle includes a display time period and a touch time period. The driving method includes: within a period during which initial N rows of gate lines are turned on after entering the display time period from the touch time period in the display cycle, controlling and adjusting the clock signal to increase a falling speed of a potential of a gate drive signal outputted by the shift register unit; N is a positive integer. The phenomenon of poor horizontal stripes is improved.