Shift Register Fault Detection for Chip Injection Attacks
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Solution Overview
Problem
Electronic chips, such as bank card chips, are vulnerable to attacks where hackers inject faults to determine the chip's operation and extract confidential information by analyzing the circuit's processing zones.
Innovation Solution
A fault detection device comprising a shift register and a comparison logic circuit that alternates binary signals and compares values in successive cells to detect injected faults, using Exclusive OR gates and inverters to identify modifications in the circuit's outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fault detection device is added to protect against attacks, then security against fault injection is improved, but device complexity increases
Solution Approach 1:
The protection mechanism is segmented into independent units: multiple shift registers (each protecting specific circuit zones) and distributed comparison logic circuits. This modular segmentation allows the system to detect faults in different regions independently, maintaining security while managing complexity through modular design rather than a monolithic complex system.
Solution Approach 2:
The shift register acts as an intermediary between the clock signal and the comparison logic. It stores and propagates clock cycles through its cells, allowing the comparison logic to detect anomalies without directly interfacing with the main clock distribution network. This intermediary role simplifies the integration of the detection mechanism into the existing circuit architecture.
2Reliability
If shift register and comparison logic are used to detect faults, then fault detection capability is improved, but area occupied on chip increases
Solution Approach 1:
The shift register serves multiple functions: it distributes clock signals to various circuit zones, stores clock cycles for comparison, and enables fault detection through its interaction with the comparison logic. By making the shift register multi-functional, the patent reduces the need for separate dedicated components, thereby minimizing the additional area required while maintaining comprehensive fault detection capability.
Solution Approach 2:
The comparison logic is strategically placed to monitor specific critical zones of the circuit where fault injection attacks are most likely to occur. Rather than uniformly distributing detection resources across the entire chip, the system concentrates detection capability in locally critical areas, optimizing the area-to-protection ratio by placing detection resources where they provide maximum security value.
Data Source
AI summary
A device can be used for detecting faults. A shift register is suitable for shifting, in tempo with a clock, a binary signal alternating between two logic levels, in successive cells of the shift register. A first logic circuit is suitable for comparing values contained in at least one pair of cells of the register.