Shift Register Unit Suppressing Flicker via Delay Circuit
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Solution Overview
Problem
Parasitic capacitance in thin film transistor liquid crystal displays (TFT-LCDs) causes sudden changes in gate scan signals, leading to display brightness fluctuations and flicker defects due to the overlap of electrodes, which existing technologies have not effectively addressed.
Innovation Solution
A shift register unit with specific circuit configurations, including first and second output circuits, a delay circuit, and voltage control circuits, is designed to modify the waveform of the gate scan signal, suppressing changes in pixel voltage without affecting the charging rate of the pixel electrode, thereby reducing flicker.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high to low transition of the gate scan signal is applied, then the gate line is properly driven, but the pixel voltage changes due to parasitic capacitance causing display brightness fluctuation and flicker
Solution Approach 1:
The delay circuit generates a delayed version of the gate scan signal that is activated before the main gate scan signal transitions. This preliminary action pre-charges the pixel electrode through the first voltage terminal, so when the gate scan signal transitions, the pixel voltage is already prepared to maintain stability, preventing the harmful voltage change caused by parasitic capacitance
Solution Approach 2:
The first voltage terminal acts as an intermediary element between the delay circuit and the pixel electrode. It provides a controlled voltage path that mediates the interaction between the gate scan signal and the pixel electrode, allowing voltage adjustment without directly connecting the gate signal to the pixel electrode, thus preventing direct parasitic capacitance effects
2Speed
If the gate scan signal transitions quickly to maintain charging rate, then the display responds faster, but parasitic capacitance causes more significant pixel voltage changes and flicker
Solution Approach 1:
The delay circuit creates a time-shifted version of the gate scan signal that activates the first voltage terminal before the main signal. This preliminary action allows the pixel electrode to be pre-prepared for voltage stability during quick transitions, enabling fast charging rates without the harmful parasitic capacitance effects that would normally cause flicker
Solution Approach 2:
The delay circuit and first voltage terminal work together to provide beforehand cushioning by pre-establishing the appropriate voltage conditions on the pixel electrode before the main gate scan signal transitions. This cushioning effect absorbs the冲击 of parasitic capacitance, allowing rapid signal transitions without causing harmful voltage changes or flicker
Data Source
AI summary
A shift register unit including a first output circuit configured to transfer a clock signal at a clock signal terminal to a signal output terminal as an output signal in response to a first node being at an active potential, a second output circuit configured to transfer the clock signal at the clock signal terminal to a carry output terminal as a carry output signal in response to the first node being at the active potential, and a delay circuit configured to generate a delayed version of a carry input signal in response to the carry input signal at a carry input terminal being active, and to transfer an inactive voltage at a first voltage terminal to the signal output terminal in response to the delayed version of the carry input signal being active.