Shift Register Gate Signal Compensation for TFT Deterioration
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Solution Overview
Problem
Display devices face issues due to threshold voltage shifts caused by transistor deterioration, leading to output deviations and defects that are propagated across stages.
Innovation Solution
A compensation circuit is introduced in the display device, utilizing a compensation transistor network to form a compensation voltage at the QB-node, compensating for transistor deterioration by leveraging potentials of the Q-node and QB-node, and adjusting voltages through first and second low-voltage lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistor deterioration is not compensated, then device complexity remains low, but output deviation and defects increase across stages
Solution Approach 1:
The compensation circuit performs threshold voltage compensation in advance by storing the compensation voltage in a capacitor during a dedicated compensation period before the signal generation period begins. This preliminary action prevents output deviation from occurring in the first place, rather than correcting it after it appears.
Solution Approach 2:
The operation is divided into distinct time periods: a compensation period for threshold voltage compensation and a signal generation period for normal operation. This temporal segmentation allows the circuit to perform compensation functions separately from signal generation, enabling reliable compensation without interfering with normal operation.
2Reliability
If compensation circuit is added to compensate for transistor deterioration, then output stability improves, but device complexity increases
Solution Approach 1:
The compensation circuit uses signals already present in the system (clock signals and existing node potentials) to generate the compensation voltage. The Q-node potential from the inverter and the clock signal phase differences are utilized to automatically generate compensation without requiring external intervention or additional complex control logic.
Solution Approach 2:
The compensation circuit shares components and signals with the existing signal generation circuitry. The same inverter outputs both the gate signal and provides the Q-node potential for compensation. The clock signal serves both timing control and compensation voltage generation purposes, reducing the need for separate dedicated compensation components.
Data Source
AI summary
Provided is a display device including a display panel configured to display an image, and a shift register connected to the display panel and including stages each having an output terminal for outputting a gate signal and a carry terminal for outputting a carry signal, where an Nth stage among the stages includes a signal generator configured to operate based on an Nth clock signal, an (N−4)th carry signal, an (N+4)th gate signal, an (N+4)th carry signal, a first low voltage, and a second low voltage, and a compensation circuit configured to operate based on potentials of a Q-node and a QB-node included in the signal generator and a signal output from another stage, and including a transistor configured to form a compensation voltage at the QB-node to compensate for deterioration of a transistor connected to the QB-node.