Shift Register Gate Layout to Prevent Antenna-Effect Damage
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Solution Overview
Problem
As semiconductor display devices increase in size, the larger transistors required for driver circuits lead to increased wiring areas, which are prone to electrostatic destruction due to the 'antenna effect' during manufacturing, reducing yield and reliability.
Innovation Solution
Dividing conductive films functioning as gate electrodes into multiple layers and electrically connecting them with a different conductive film to reduce the area of each gate electrode, thereby minimizing charge accumulation and electrostatic damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the transistor size is increased to meet current supply ability requirements for larger panels, then the current supply ability is improved, but the area of the gate electrode wiring is increased, leading to higher probability of electrostatic destruction
Solution Approach 1:
The gate electrode wiring is divided into multiple separate conductive films (first conductive film and second conductive film) instead of using a single continuous wiring. This segmentation reduces the total area of the gate electrode wiring that is exposed to plasma during manufacturing, thereby reducing charge accumulation and the risk of electrostatic destruction while still providing the necessary current supply ability for larger panels
Solution Approach 2:
The patent introduces a vertical dimension by stacking conductive films at different heights (first conductive film at a lower level and second conductive film at a higher level). This three-dimensional arrangement allows the gate electrode functionality to be distributed across multiple layers, reducing the planar area of each individual conductive film and thus mitigating the antenna effect during plasma processing
2Power
If the area of gate electrode wiring is increased to accommodate larger transistor sizes, then the current supply ability is improved, but charge accumulation in the wiring increases due to the antenna effect
Solution Approach 1:
The gate electrode wiring is divided into multiple separate conductive films (first conductive film and second conductive film) instead of using a single continuous wiring. This segmentation reduces the total area of the gate electrode wiring that is exposed to plasma during manufacturing, thereby reducing charge accumulation and the risk of electrostatic destruction while still providing the necessary current supply ability for larger panels
Solution Approach 2:
An insulating film is introduced between the first conductive film and the second conductive film to electrically isolate them. This intermediary layer prevents direct electrical connection between the stacked conductive films, allowing each film to be processed independently and reducing the overall antenna effect during plasma processing while maintaining the necessary electrical functionality
Data Source
AI summary
A semiconductor device in which a decrease in the yield by electrostatic destruction can be prevented is provided. A scan line driver circuit for supplying a signal for selecting a plurality of pixels to a scan line includes a shift register for generating the signal. One conductive film functioning as respective gate electrodes of a plurality of transistors in the shift register is divided into a plurality of conductive films. The divided conductive films are electrically connected to each other by a conductive film which is formed in a layer different from the divided conductive films are formed. The plurality of transistors includes a transistor on an output side of the shift register.