Shift Register Gate Line Control for Display Power Reduction
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Solution Overview
Problem
High-resolution display panels experience significant power consumption increases due to the growing number of rows of pixel units, necessitating a solution to manage power usage effectively.
Innovation Solution
A shift register and gate line driving method that divides the display area into high-resolution and low-resolution areas, where gate lines are controlled to be turned on and off row by row in high-resolution areas and group by group in low-resolution areas, with adjacent gate lines in low-resolution areas being turned on and off synchronously to reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of rows of pixel units is increased to achieve higher resolution, then the display resolution is improved, but the power consumption increases sharply
Solution Approach 1:
The patent divides the display panel into high-resolution areas and low-resolution areas, segmenting the pixel units into different groups. In low-resolution areas, multiple pixel units share the same gate line and are scanned simultaneously, reducing the total number of scanning operations required and thereby lowering power consumption while maintaining overall high resolution capability
Solution Approach 2:
The patent merges multiple gate lines in low-resolution areas into a single shared gate line, allowing simultaneous scanning of multiple rows of pixel units. This merging reduces the number of independent scanning operations, decreases the load on the source driver, and reduces power consumption without completely sacrificing display quality in those areas
2Measurement precision
If gate lines are scanned row by row to maintain high resolution, then the display quality is preserved, but the power consumption increases
Solution Approach 1:
The patent applies different scanning strategies to different regions of the display panel. High-resolution areas maintain row-by-row scanning to preserve display quality, while low-resolution areas use group-by-group scanning with shared gate lines to reduce power consumption. This local differentiation allows the system to optimize for quality where needed and for energy efficiency where possible
3Measurement precision
If the number of pixel units is increased to achieve higher resolution, then the display capability is improved, but the load on the source driver increases
Solution Approach 1:
The patent merges multiple gate line control functions into shared gate lines for low-resolution areas, reducing the number of independent control signals required from the source driver. This merging approach decreases the computational and control load on the source driver while still enabling the display of high-resolution content in designated areas
Data Source
AI summary
A shift register, a gate line driving method, an array substrate and a display device are provided. The shift register includes a plurality of shift register s arranged in a one-to-one correspondence with gate lines on an array substrate; and a control circuit configured to control signals outputted from the shift register s to the gate lines, to control each row of gate lines to be turned on and off, so that a display area has a high-resolution area and a low-resolution area. In the low-resolution area, the control circuit controls the gate lines to be turned on and off group by group. Each group of gate lines include at least two adjacent gate lines, and gate lines in the same group are turned on and off synchronously.