Shift Register Gate Drive Circuit for High-Temperature Noise Control
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Solution Overview
Problem
The existing amorphous silicon gate (ASG) type gate drive circuits for LCDs face challenges in reducing the integrated circuit area while maintaining high temperature margin and reliability, as they generate noise defects and require additional holding parts that increase the circuit area.
Innovation Solution
A gate drive circuit design with a shift register having cascade-connected stages, including pull-up, pull-down, discharging, and holding parts, which omits conventionally needed transistors for noise control by maintaining a negative gate-source voltage, thereby reducing the integrated area and power consumption while enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If various holding parts are added to the gate drive circuit to reduce high temperature noise, then the high temperature margin is improved, but the integrated circuit area is increased
Solution Approach 1:
The patent combines the holding part function with the existing shift register structure by utilizing the carry signal output terminal to also serve as a holding function. The n-th stage shift register uses its carry signal output to control the discharging of the Q node, integrating the holding function into the existing circuit rather than adding a separate dedicated holding circuit, thereby reducing the integrated area while maintaining high temperature margin.
Solution Approach 2:
The carry signal output terminal of the n-th stage shift register is given dual functionality: it serves both as the carry signal output for the next stage and as the control signal for the discharging part. This multi-functional design eliminates the need for separate holding circuitry, reducing the overall circuit area while preserving the ability to maintain stable operation at high temperatures.
2Duration of action of stationary object
If the gate drive circuit operates for a long time at high temperature, then the duration of action is improved, but high temperature noise is generated in the gate signal
Solution Approach 1:
The patent applies preliminary action by proactively discharging the Q node to the second low voltage level before the next gate signal cycle begins. The discharging part is activated by the (n+1)th carry signal to preemptively reset the Q node, preventing the accumulation of noise and thermal effects during prolonged high-temperature operation. This preliminary discharge action ensures the circuit is ready for the next cycle without carrying over thermal noise.
3Device complexity
If the number of transistors is reduced to decrease integrated circuit area, then the device complexity is reduced, but the driving reliability may be compromised
Solution Approach 1:
The patent merges the holding function into the existing shift register structure, eliminating the need for separate dedicated holding transistors. The carry signal output terminal is reused to control the discharging part, reducing the total transistor count while maintaining reliable operation through the integrated design that preserves all necessary functions.
Data Source
AI summary
A gate drive circuit includes a shift register in which plural stages are cascade-connected to each other. In an n-th stage, a pull-up part outputs a high voltage of a clock signal to an output node as a high voltage of an n-th gate signal in response to a high voltage on a first node. A pull-down part pulls the high voltage of the n-th gate signal down to a first low voltage in response to an (n+1)th carry signal. A discharging part discharges the first node to a second low voltage level lower than the first low voltage level in response to the (n+1)th carry signal. A carry part outputs the high voltage of the clock signal as an n-th carry signal (mirroring the n-th gate signal) in response to a high voltage on the first node.