Shift Register Gate Potential Control for Threshold Voltage Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional shift registers face operational issues due to high threshold voltage variations in transistors, leading to decreased on-current and potential drops, which can result in erroneous operation, especially under temperature changes or transistor degradation.
Innovation Solution
A shift register design that includes unit circuits with an output transistor, a set transistor, and a set control unit, where the set control unit applies on-potential and off-potential in a switching manner to the control terminal of the set transistor, allowing the control terminal to enter a floating state, thereby maintaining a sufficient on-potential without threshold drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional shift register with bootstrap method is used, then the circuit can operate with standard transistor configurations, but the operation margin decreases when transistor threshold voltage becomes high due to manufacturing variations, temperature changes, or degradation
Solution Approach 1:
The patent applies preliminary action by pre-charging the gate of the output transistor through a dedicated set transistor before the main switching operation. This ensures that even when threshold voltage increases due to degradation or temperature changes, the transistor already has sufficient gate potential to maintain reliable operation. The set control unit activates the set transistor in advance during specific clock phases to charge the gate node, creating a head start that compensates for subsequent threshold voltage increases.
Solution Approach 2:
The patent changes the electrical parameters of the output transistor by dynamically adjusting its gate potential through the set transistor mechanism. Instead of relying on a fixed bias, the gate potential is actively managed and elevated above standard levels during critical operation phases. This parameter change allows the transistor to maintain adequate on-current even when threshold voltage increases, effectively expanding the acceptable range of threshold voltage variations.
2Reliability
If the threshold voltage of transistors increases due to degradation or temperature changes, then the on-current decreases and potential drops occur, but adding compensation circuits increases circuit complexity
Solution Approach 1:
The set transistor and set control unit serve multiple functions within the shift register circuit. They not only pre-charge the output transistor gate to compensate for threshold voltage effects, but also integrates seamlessly with the existing clock signal distribution and transistor switching mechanisms. This multi-functionality allows threshold voltage compensation without adding separate dedicated compensation circuits, thereby limiting the increase in overall circuit complexity.
Solution Approach 2:
The patent merges the threshold voltage compensation function with the existing clock-driven switching mechanism. The set control unit utilizes the same clock signals (CK1, CK2) that drive the main shift register operation to control the set transistor timing. By combining these functions and using shared control signals, the patent achieves compensation without requiring entirely separate control logic or additional signal paths that would increase complexity.
3Reliability
If the gate potential of output transistor is kept close to clock signal high level to reduce waveform rounding, then threshold voltage drops cause erroneous operation, but increasing gate potential margin reduces waveform quality
Solution Approach 1:
The patent applies periodic action by using clock-driven periodic charging and discharging cycles. The set transistor is activated during specific phases of the clock cycle (when CK1 or CK2 is high) to charge the output transistor gate, then deactivated during other phases to allow the transistor to switch normally. This periodic charging provides sufficient gate potential during critical phases to prevent threshold voltage issues, while allowing waveform quality to be maintained during switching phases when the charging is temporarily suspended.
Data Source
AI summary
A shift register is configured by connecting unit circuits 1 in multiple stages. An output transistor Tr1 switches between whether or not to output a clock signal CKA in accordance with a gate potential. A set transistor Tr2 switches between whether or not to provide an output of an on-potential output unit 2 to a gate terminal of Tr1 in accordance with an output of a set control unit 3. The set control unit 3 controls a gate terminal of Tr2 into a floating state in part of a period during which a high-level potential is provided to the gate terminal of Tr1. The gate potential of Tr2 is raised by being pushed up, whereby a high-level potential without a threshold drop is provided to the gate terminal of Tr1, and rounding of an output signal OUT is decreased when the output signal OUT shifts to a high level. Accordingly, an operation margin with respect to fluctuation of a threshold voltage of the transistor is increased.