Shift Register Initialization Circuit for Display Driver
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Solution Overview
Problem
Shift registers malfunction due to phase relations between clock signals during the initial operation period, especially when clock signals to intermediate stages are inactive.
Innovation Solution
The shift register is configured with an initial stage, first and second intermediate stages, and a final stage, where the second intermediate stage includes a control circuit and a setting circuit to manage the electric potential of the output transistor, ensuring the clock signal to the second intermediate stage is inactive initially during the operation period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If clock signals are not supplied to intermediate stages during non-operation period to reduce power consumption, then power consumption is reduced, but malfunction occurs during initial operation period due to phase relation issues
Solution Approach 1:
The setting circuit is activated before the main operation begins to pre-establish the correct electric potential state in the second intermediate stage. This preliminary action ensures that when clock signals start being supplied during the initial operation period, the circuit is already in the proper state to avoid malfunction, thus resolving the contradiction between power saving and reliable operation startup.
Solution Approach 2:
The setting circuit acts as an intermediary component between the clock signal inputs and the output transistor in the second intermediate stage. It mediates the transition from inactive to active state by controlling the electric potential of the output transistor, ensuring smooth operation startup without malfunction while maintaining power savings during non-operation periods.
2Reliability
If the second intermediate stage operates with inactive clock signal to the second input terminal initially, then proper phase relation is maintained, but device complexity increases due to additional control circuit
Solution Approach 1:
The setting circuit is merged with the existing output transistor and its control terminal in the second intermediate stage. By utilizing the existing control terminal and integrating the setting function into the current circuit topology, the patent achieves phase relation control without adding significant structural complexity, thus resolving the contradiction between reliability and device complexity.
Data Source
AI summary
A shift register is configured so that each of first and second intermediate stages includes (i) a first input terminal supplied with a clock signal, (ii) a second input terminal supplied with a clock signal different in phase from the clock signal supplied to the first input terminal, (iii) an output terminal connected to the first input terminal via an output transistor, and (iv) a setting circuit, which is connected to the second input terminal and the output transistor, for setting an electric potential of a control terminal of the output transistor, the second intermediate stage includes a control circuit which is (i) connected to the setting circuit of the second intermediate stage and (ii) supplied with a control signal, an operation period (i) starts at a time when a shift start signal supplied to an initial stage is activated and (ii) ends at a time when an output of a final stage changes from activation to inactivation, and when the clock signal supplied to the first input terminal of the second intermediate stage is initially activated after the operation period starts, the clock signal supplied to the second input terminal of the second intermediate stage is inactive.