Shift Register Initialization Transistor Voltage Protection
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Solution Overview
Problem
Conventional shift registers face issues with transistor degradation and breakdown during initialization due to high voltages applied between the source and drain, which can be mitigated by increasing the transistor length or using dual gate transistors, but these methods increase layout area.
Innovation Solution
A shift register design that includes an output transistor, a breakdown voltage transistor, and an initialization transistor, where the second conduction terminal of the initialization transistor is connected to a node with an off-potential at initialization and the same level as the clock signal during operation, preventing high voltage application between the conduction terminals of the initialization transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors Q3, Q4 are added to perform initialization by providing high-level initialization signal, then initialization function is achieved, but high voltage is applied between source and drain of initialization transistor causing degradation or breakdown
Solution Approach 1:
A bootstrap capacitor is introduced as an intermediary element between the initialization transistor and the high-voltage node. The capacitor couples the initialization signal while blocking the high voltage from appearing across the initialization transistor, thus protecting it from degradation and breakdown while maintaining the initialization function.
Solution Approach 2:
The voltage across the initialization transistor is changed from high voltage to low voltage by introducing the bootstrap capacitor. The capacitor charges to the high voltage level and then maintains a constant voltage difference, ensuring that the initialization transistor operates within safe voltage limits while still achieving effective initialization.
2Reliability
If dual gate transistor or increased L-length is used for initialization transistor, then transistor breakdown is prevented, but layout area increases
Solution Approach 1:
The bootstrap capacitor serves as an intermediary that protects the initialization transistor without requiring changes to the transistor structure itself. This approach maintains the standard transistor dimensions and layout area while still preventing breakdown through voltage isolation.
Solution Approach 2:
Instead of changing transistor physical parameters (gate length, gate structure), the solution changes the voltage parameters by introducing the capacitor. This keeps the transistor geometry unchanged, thereby maintaining compact layout area while achieving reliable breakdown prevention.
3Ease of operation
If high voltage is applied to initialize the shift register, then initialization is achieved, but transistor degradation occurs
Solution Approach 1:
The bootstrap capacitor acts as a mediator that transmits the initialization function while filtering out the harmful high voltage. It charges to the required voltage level and then maintains a safe voltage difference across the initialization transistor, enabling initialization without durability compromise.
Solution Approach 2:
The bootstrap capacitor is pre-charged to the appropriate voltage level before initialization occurs. This beforehand charging creates a voltage cushion that prevents high voltage from appearing across the initialization transistor during operation, thus protecting it from degradation while maintaining initialization capability.
Data Source
AI summary
A shift register is configured by connecting unit circuits 1 in multiple stages. An output transistor Tr1 switches between whether or not to output a clock signal CKA in accordance with a gate potential. A drain terminal of an initialization transistor Tra is connected to a gate terminal of the Tr1, and a source terminal thereof is connected to an output terminal OUT or a clock terminal CKA. The source terminal of the Tra is connected to a node which has a low-level potential at the time of initialization and has a potential at the same level as the clock signal when the clock signal having a high-level potential is outputted. Thus, at the time of outputting the clock signal having the high-level potential, application of a high voltage between the source and the drain of the Tra is prevented, and degradation and breakdown of the initialization transistor are prevented.