Shift Register Unit Power Reduction via Intermediate Signal Control
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Solution Overview
Problem
High power consumption in shift register units due to frequent switching of transmission gates by clock signals during non-operational states in high-resolution display technologies, leading to reduced display driving efficiency.
Innovation Solution
A shift register unit design that controls the switching of transmission gates using an intermediate signal based on the clock and input signals, rather than solely relying on the clock signal, to prevent unnecessary power consumption during non-operational states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transmission gates are controlled by clock signal during non-operational states, then the shift register unit can maintain readiness for next operation, but useless power consumption increases due to frequent switching
Solution Approach 1:
The patent extracts the harmful effect of clock signal switching by introducing a control signal that selectively disables the transmission gate during non-operational states. The control signal is derived from the clock signal itself through a specific circuit configuration that generates an inverted control signal to turn off the transmission gate when the shift register is not actively shifting data, thereby eliminating the parasitic charging and discharging of gate capacitors.
Solution Approach 2:
The patent implements dynamic control of the transmission gate switching behavior. Instead of static control where the transmission gate switches with every clock cycle regardless of operational state, the system dynamically adjusts the transmission gate state based on whether the shift register is in an operational or non-operational state, optimizing power consumption while maintaining functionality.
2Speed
If transmission gates switch frequently with clock signal, then clock signal distribution is maintained, but power consumption increases due to gate capacitor charging and discharging
Solution Approach 1:
The patent implements periodic control of the transmission gate switching based on the operational cycles of the shift register. During non-operational periods, the transmission gate remains disabled to prevent power consumption. The control mechanism periodically enables the transmission gate only when data shifting operations are required, creating a periodic switching pattern that aligns with the actual operational needs rather than continuous clock signal transitions.
3Stability of the object's composition
If shift register units operate in non-operational state, then they can maintain system architecture, but overall display driving efficiency decreases due to continuous clock signal loading
Solution Approach 1:
The patent introduces a control signal as an intermediary between the clock signal and the transmission gate. This control signal acts as a mediator that determines whether the transmission gate should respond to clock signal transitions. By using this intermediary control mechanism, the system maintains architectural stability while preventing unnecessary power consumption during non-operational states, thereby improving overall display driving efficiency.
Data Source
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AI summary
Embodiments of the present disclosure provide a shift register unit and a driving method thereof, a gate driving circuit and a display device. The shift register unit comprises a latch module and a latch output module. Switching on and off of the transmission gates is controlled by using an intermediate signal generated based on a clock signal and an inputted signal, instead of by using the clock signal, such that the shift register unit will not be influenced by frequent flips of the clock signal in a non-operational state, thus avoiding a great deal of useless power consumption.