Shift Register Circuit Leakage Reduction via Channel Design
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing Gate Driver on Array (GOA) technology for liquid crystal displays suffers from electrical leakage due to transistors being in a positive voltage state for a long time, leading to rapid reliability degradation and potential damage, which is not cost-effective and results in low display quality.
Innovation Solution
A shift register circuit with a specific configuration of switches and a compensation circuit is introduced, including a first switch, a second switch, a third switch, and a fourth switch, along with a pull-down sub-circuit and controller, to manage potential differences and prevent electrical leakage by increasing the internal channel length or designing dual channels, thereby reducing the risk of electrical leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the gate driver circuit is directly manufactured on the array substrate using conventional GOA technology, then manufacturing costs are reduced and panel thickness is decreased, but transistors remain in positive voltage state for too long causing electrical leakage and reliability degradation
Solution Approach 1:
The transistor switching operation is segmented into two distinct phases: a first switching operation during the high voltage period and a second switching operation during the low voltage period. This segmentation allows independent optimization of each phase, enabling the transistors to receive adequate rest during the low voltage period while maintaining the GOA manufacturing advantages
Solution Approach 2:
The circuit implements periodic switching operations with alternating high and low voltage periods. The first switch operates during the high voltage period to transfer signals, while the second switch operates during the low voltage period to reset the circuit. This periodic action ensures transistors are not continuously stressed and receive regular rest periods, preventing electrical leakage
2Device complexity
If transistors are continuously operated in positive voltage state to maintain simple circuit operation, then device complexity is reduced, but electrical leakage increases and service life decreases
Solution Approach 1:
A capacitor is introduced as an intermediary energy storage element between the first and second switches. The capacitor stores energy during the high voltage period and releases it during the low voltage period, enabling the second switching operation without requiring continuous high voltage supply. This intermediary component allows transistors to rest during low voltage periods while maintaining circuit functionality
Solution Approach 2:
The circuit dynamically changes the voltage parameter over time, switching between high voltage and low voltage states. During the high voltage period, the first switch operates with high voltage to transfer signals. During the low voltage period, the voltage is reduced and the second switch operates, allowing transistors to rest. This parameter change prevents continuous stress on transistors while maintaining relatively simple circuit operation
Data Source
AI summary
This application provides a shift register circuit, a waveform generating method for same, and a display panel using same. The shift register circuit includes a plurality of stages of shift registers, including: a first switch, including a control end of the first switch electrically coupled to a first node, a first end of the first switch electrically coupled to a frequency signal, and a second end of the first switch is electrically coupled to an output pulse signal; a second switch, including a control end of the second switch electrically coupled to an input pulse signal, a first end of the second switch electrically coupled to the input pulse signal, and a second end of the second switch electrically coupled to the first node; a third switch, including a control end of the third switch electrically coupled to a second node, a first end of the third switch is electrically coupled to the output pulse signal, and a second end of the third switch is electrically coupled to a preset low potential; and a fourth switch, including a control end of the fourth switch is electrically coupled to the second node, a first end of the fourth switch is electrically coupled to the first node, and a second end of the fourth switch is electrically coupled to the preset low potential, a length of an internal channel between the first end of the fourth switch and the second end of the fourth switch is increased, or an internal channel between the first end of the fourth switch and the second end of the fourth switch is designed as dual channels.


