Shift Register Circuit Preventing Leakage Currents in Oxide TFT Displays
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Solution Overview
Problem
Oxide thin film transistors (TFTs) used in shift register circuits often experience gate leakage, leading to incomplete output cascades and abnormal terminal outputs due to their depletion mode nature, causing electric leakage and operational issues in display technologies.
Innovation Solution
A shift register circuit design incorporating specific sub-circuits and transistors with controlled voltage and clock signal transmission, including input, output, control, and reset sub-circuits, to manage voltage signals and prevent leakage by ensuring transistors are completely turned off during output phases, utilizing a combination of transistors and capacitors to maintain signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If oxide TFTs are used in shift register circuits, then the circuit can be manufactured with oxide thin film technology, but gate leakage occurs due to depletion mode operation
Solution Approach 1:
The circuit is divided into multiple independent sub-circuits (input sub-circuit, output sub-circuit, first control sub-circuit, second control sub-circuit), each with specific functions. This segmentation allows precise control of voltage signals to different nodes, enabling complete turn-off of transistors during output phases to prevent gate leakage while maintaining oxide TFT manufacturability
Solution Approach 2:
The patent changes the voltage parameters applied to different nodes dynamically. Specifically, it applies first voltage signal from first power supply voltage terminal to second node, and second voltage signal from second power supply voltage terminal to second node, with different voltage levels to ensure transistors are completely turned off during output phases, thereby preventing gate leakage in oxide TFT-based circuits
2Device complexity
If depletion mode oxide TFTs are used, then the transistor structure is simple, but output cascade becomes incomplete due to electric leakage
Solution Approach 1:
The patent introduces control sub-circuits as intermediary elements between the simple depletion mode oxide TFT structure and the output stage. These control sub-circuits manage voltage signals to intermediate nodes, ensuring proper transistor switching states that complete the output cascade while maintaining the simplicity of the underlying transistor structure
Solution Approach 2:
The control sub-circuits perform preliminary actions by pre-establishing proper voltage signals at intermediate nodes before the output phase. This ensures transistors are completely turned off in advance during output phases, preventing electric leakage that would otherwise cause incomplete output cascade
3Ease of operation
If oxide TFTs operate in depletion mode, then the transistor operation is straightforward, but terminal outputs become abnormal due to leakage currents
Solution Approach 1:
The patent implements feedback mechanisms through control sub-circuits that monitor and adjust voltage signals at intermediate nodes. This feedback ensures terminal outputs remain normal by dynamically controlling transistor states to prevent leakage currents, while maintaining straightforward depletion mode operation of oxide TFTs
Data Source
AI summary
A shift register circuit is provided. The shift register circuit includes an input sub-circuit, an output sub-circuit, a first control sub-circuit and a second control sub-circuit. The input sub-circuit is connected to a first signal input terminal, a second signal input terminal and a first node. The output sub-circuit is connected to the first node, a first clock signal terminal and a first output terminal. The first control sub-circuit is connected to a first power supply voltage terminal, a second power supply voltage terminal, the first node and a second node. The second control sub-circuit is connected to the second power supply voltage terminal, a third power supply voltage terminal, the second node and a third node, and the third node is further connected to the input sub-circuit.