Shift Register Leakage Control Using Preset Voltages
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Solution Overview
Problem
In Gate Driver on Array (GOA) technology, Thin Film Transistor (TFT) devices experience negative threshold voltage shifts, leading to leakage issues when Vth is less than or close to 0V, affecting the operating stability and display effect of display panels.
Innovation Solution
A shift register design incorporating multiple sub-circuits, including pull-down and control sub-circuits, that utilize preset voltage signals to manage the potential of nodes, preventing leakage by ensuring transistors are completely turned off, even with negative threshold voltage shifts, thereby enhancing the stability and display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If 0V leakage control is used in TFT devices, then the structure is simple, but leakage occurs when Vth is less than or close to 0V, affecting operating stability
Solution Approach 1:
The patent changes the voltage parameter from 0V to negative voltage (second preset voltage lower than first preset voltage). The first pull-down sub-circuit uses first preset voltage to pull down the pull-down node, while the first control sub-circuit uses second preset voltage (lower than first preset voltage) to control the pull-up node, ensuring complete transistor turn-off even with negative threshold voltage shifts
Solution Approach 2:
The patent applies preliminary action by proactively pulling down the pull-down node to a lower potential using preset voltages before leakage can occur. The pull-down sub-circuits and control sub-circuits are designed to maintain negative voltage levels that preemptively prevent transistor leakage, rather than reacting to leakage after it occurs
2Duration of action of moving object
If TFT operates at positive or negative bias for long time, then the device can maintain operation, but Vth shifts occur causing leakage when Vth approaches 0V
Solution Approach 1:
The patent dynamically adjusts voltage parameters over time by using two different preset voltage levels. The first pull-down sub-circuit maintains the pull-down node at first preset voltage, while the first control sub-circuit applies second preset voltage (lower than first preset voltage) to the pull-up node, creating a voltage differential that compensates for long-term Vth shifts and maintains reliable transistor control
Solution Approach 2:
The patent implements feedback through the control sub-circuit that monitors the pull-down node potential and responds by adjusting the pull-up node potential. When the pull-down node is pulled down to first preset voltage, the control sub-circuit activates to pull down the pull-up node to second preset voltage, creating a feedback mechanism that maintains proper transistor off-state despite long-term operation and Vth drift
Data Source
AI summary
A shift register, a gate drive circuit, and a display panel are provided. The shift register includes an input sub-circuit configured to pre-charge a pull-up node using an input signal; an output sub-circuit configured to output a clock signal through an signal output terminal; a pull-down control sub-circuit configured to control a potential of a pull-down node using a power supply voltage signal; a first pull-down sub-circuit configured to pull down a potential of the pull-down node using a first preset voltage signal; and a first control sub-circuit configured to control the potential of the pull-up node using a second preset voltage signal in response to the potential of the pull-down node; a potential of the first preset voltage signal is lower than a potential of a non-operating level signal of the first pull-down sub-circuit, but higher than a potential of the second preset voltage signal.