Shift Register Leakage Prevention for Stable Pull-Up Nodes

The shift register circuit is segmented into functional modules: input circuit, leakage prevention input unit, and leakage prevention unit. Each module performs a specific function, allowing the leakage prevention mechanism to be added without redesigning the entire circuit. The leakage prevention unit is further divided into multiple transistor components (first transistor, second transistor, third transistor) that work independently to control different aspects of voltage stabilization.

The leakage prevention unit acts as an intermediary between the input circuit and the pull-up node. It introduces intermediate control nodes (first control node, second control node) that mediate the voltage transmission, preventing direct leakage paths while maintaining signal integrity. The first and second transistors in the leakage prevention unit serve as intermediary elements that control voltage flow based on clock signals.

The leakage prevention unit is applied locally at the pull-up node where voltage instability occurs, rather than modifying the entire shift register circuit. The first and second transistors are positioned specifically to control voltage at the pull-up node, providing targeted stabilization without affecting other parts of the circuit unnecessarily.

The leakage prevention unit serves multiple functions: it stabilizes voltage at the pull-up node, prevents leakage currents, and maintains signal integrity during clock cycles. The same transistor components (first, second, third transistors) are used to achieve both voltage stabilization and leakage prevention, reducing the need for additional dedicated components.

The leakage prevention function is merged with the existing clock signal generation in the shift register. The first and second voltage signals are derived from the same clock signal source, allowing simultaneous generation without additional external components. The leakage prevention input unit combines multiple voltage signals at a single input node, reducing the need for separate signal paths.

The leakage prevention unit creates equipotential conditions at the pull-up node by using the first and second transistors to maintain stable voltage levels. When the clock signal is at a high level, both transistors are turned on to maintain the pull-up node at a stable potential, preventing leakage-induced voltage drops without requiring additional voltage sources.