Shift Register Circuit With Periodic Level Shifting for Low-Power Clocks
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Solution Overview
Problem
The existing shift register circuits in liquid crystal display devices face challenges in reducing electric power consumption, particularly due to the need for high swing voltage clock signals exceeding 10V, which complicates the circuit structure and increases power consumption.
Innovation Solution
A shift register circuit incorporating an OR-gate unit, a level shift unit, and a buffer that utilizes two-phase clock signals with a swing voltage lower than 10V, allowing for level-shifting only during specific periods to minimize power consumption and simplify the circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high swing voltage clock signals (exceeding 10V) are used in the shift register circuit, then the circuit can operate reliably, but the electric power consumption increases and the circuit structure becomes complicated
Solution Approach 1:
The patent applies dynamic control by enabling the level shift unit only during specific periods when needed for level conversion. The level shift unit is controlled by a control signal that activates it only when the clock signal needs to be level-shifted, rather than continuously operating. This dynamic activation reduces power consumption while maintaining reliable circuit operation when required.
Solution Approach 2:
The patent changes the voltage parameter of the clock signal dynamically. The level shift unit converts the clock signal from a low swing voltage (below 10V) to a high swing voltage (above 10V) only when necessary for reliable operation. By changing the voltage parameter conditionally rather than maintaining high voltage continuously, the circuit achieves reliable operation with reduced overall power consumption.
2Reliability
If high swing voltage clock signals (exceeding 10V) are used in the shift register circuit, then the circuit can operate reliably, but the circuit structure becomes complicated
Solution Approach 1:
The patent extracts the level shifting function into a separate, dedicated level shift unit that is independently controlled. Rather than incorporating level shifting capability into every circuit component, the function is extracted to a specific unit that is activated only when needed. This modular extraction simplifies the overall circuit structure while maintaining reliability.
Solution Approach 2:
The patent uses dynamic control to simplify the circuit structure. The level shift unit is enabled only during specific periods when level conversion is needed, rather than being permanently active or present in all operating modes. This dynamic approach allows the circuit to maintain simple structure during normal operation while achieving reliable operation when high voltage is required.
3Reliability
If the level shift unit operates continuously, then the clock signal level is maintained, but unnecessary electric power is consumed
Solution Approach 1:
The patent implements periodic action by operating the level shift unit only during specific periods when level conversion is required, rather than continuously. The control signal enables the level shift unit periodically based on the operational needs of the shift register circuit, allowing the clock signal level to be maintained when necessary while avoiding unnecessary power consumption during periods when level shifting is not needed.
Solution Approach 2:
The level shift unit operates autonomously based on control signals that activate it only when the clock signal requires level conversion. The unit self-regulates its operation to provide level shifting only when the circuit needs it, eliminating the need for continuous operation and reducing unnecessary power consumption while maintaining clock signal level stability when required.
Data Source
AI summary
A shift register circuit and a method of operating the same are disclosed. The shift register circuit includes an OR-gate unit for receiving a start pulse or an output of a previous stage and a feedback signal; a level shift unit for level-shifting a swing voltage of a clock signal in response to an output signal of the OR-gate unit; and a buffer for transferring an output of the level shift unit to a next stage as an input signal.