Shift Register Maintaining Module for OLED Signal Tailing

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Solution Overview

Problem

Existing shift registers in OLED display panels suffer from a 'tailing' problem with output signals, where the high-level signal cannot directly transition to a low-level signal, affecting picture display quality due to the influence of capacitors on node potentials.

Innovation Solution

Incorporating a maintaining module in the shift register that controls the potential of nodes based on input signals, clock signals, and low-level signals to prevent direct capacitor connection, allowing for quick transition from high-level to low-level signals, thereby stabilizing low-level outputs and eliminating signal tails.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If capacitors are connected to nodes in the shift register, then signal stability is improved, but signal transition speed deteriorates due to tailing effect

Engineering Contradiction:
Improvesignal stabilityVSAvoidsignal transition speed
Core Design Contradiction:
Stability of the object's compositionVSSpeed

Solution Approach 1:

The patent extracts the capacitor from the direct connection to the first node, eliminating the tailing effect that prevents fast signal transitions. By removing the capacitor's direct influence on the node potential, the circuit achieves both fast transitions and maintained stability through alternative design arrangements.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediate control mechanism that manages the capacitor's connection to the node. This intermediary approach allows the capacitor to provide stability when needed while preventing it from causing tailing effects during signal transitions, thus resolving the contradiction between stability and transition speed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If direct capacitor connection to node is used, then circuit simplicity is improved, but display quality deteriorates due to tailing signals

Engineering Contradiction:
Improvecircuit simplicityVSAvoiddisplay quality
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent segments the capacitor connection into controlled phases rather than maintaining a direct permanent connection. This segmentation allows the circuit to achieve fast signal transitions and high display quality while managing complexity through structured control mechanisms that coordinate the capacitor's engagement and disengagement.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If node potential is allowed to float, then circuit operation is simplified, but output signal quality deteriorates with tailing effect

Engineering Contradiction:
Improvecircuit operationVSAvoidoutput signal quality
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent applies preliminary control actions to manage node potential before signal transitions occur. By pre-coordinating the capacitor's connection status and node potential control, the circuit maintains simple operation while ensuring high-quality output signals without tailing effects through advance preparation of the electrical state.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12014786B2Shift register, display panel, and display drive method
Publication Date: 2024.06.18 WUHAN TIANMA MICRO ELECTRONICS CO LTD
  • US12014786B2 patent drawing
  • US12014786B2 patent drawing
  • US12014786B2 patent drawing

AI summary

A shift register, a display panel, and a display drive method are provided in the present disclosure. The shift register includes an input module, configured to output a first control signal according to an input signal; a pull-down control module, configured to control a potential of a first node according to a first clock signal, a high-level signal, a low-level signal, and the first control signal; a pull-up control module, configured to control a potential of a second node according to the first clock signal, a second clock signal, the high-level signal, and the first control signal; a maintaining module, configured to pull down the potential of the first node; a pull-down output module, configured to control an output terminal of the shift register to output the low-level signal; and a pull-up output module, configured to control the output terminal of the shift register to output the high-level signal.