Shift Register Unit Multi-Pulse Output AMOLED Gate Driver
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current technologies cannot generate a gate driving signal with multiple pulses using a single shift register unit, which is necessary for AMOLED display panels and LCD panels.
Innovation Solution
A shift register unit comprising an input module, an output module, a reset module, and a reset control module, where the output terminal of the input module, the control terminal of the output module, and the output terminal of the reset module are connected to a first node, allowing the output module to output a shifted signal with multiple pulses before the first node is reset, utilizing transistors and control terminals to manage signal levels and reset operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional shift register unit is used, then the circuit structure is simple, but it cannot generate a gate driving signal with multiple pulses
Solution Approach 1:
The shift register unit is divided into distinct functional modules: input module (first transistor), output module (second transistor), reset module (third transistor), and reset control module (fourth transistor). Each module performs a specific function in the multi-pulse signal generation process, allowing the complex capability to be achieved through organized modular components rather than a monolithic design.
Solution Approach 2:
The shift register unit is designed to perform multiple functions: it can generate single-pulse signals for compatibility with existing systems, and it can generate multi-pulse gate driving signals for AMOLED and LCD panels. The reset control module enables the unit to adapt its output based on control signals, providing universal applicability across different display technologies.
2Adaptability or versatility
If multiple shift register units are used to generate multi-pulse signals, then the signal generation capability is achieved, but the device complexity and area increase
Solution Approach 1:
The input, output, reset, and reset control functions are merged into a single integrated shift register unit. The first node serves as a shared state element that coordinates the operation of all four transistors, enabling multi-pulse signal generation within one compact unit rather than requiring multiple separate units.
Solution Approach 2:
The reset control module is nested within the overall shift register structure, with the fourth transistor controlling the third transistor's reset function. This hierarchical nesting allows the control logic to be embedded within the data path, maximizing space utilization and minimizing the overall circuit area.
3Productivity
If the first node is reset immediately after receiving a signal, then the circuit stability is maintained, but multiple pulses cannot be output
Solution Approach 1:
The reset control module performs preliminary action by preparing the reset condition in advance through the fourth transistor. The reset signal is generated only when the control terminal receives appropriate signals, allowing the first node to maintain its state for multiple clock cycles and generate multiple pulses before reset occurs.
Solution Approach 2:
The reset control module monitors the state of the first node and the control signals, and provides feedback control for the reset operation. The fourth transistor acts as a feedback element that enables or disables the reset function based on the received control signals, ensuring stable multi-pulse generation while maintaining the ability to reset when needed.
Data Source
AI summary
A shift register unit, a method for driving the same and a gate scanning circuit are provided. The shift register unit comprises an input module for receiving a signal to be shifted, an output module, a reset module and a reset control module, an output terminal of the input module, a control terminal of the output module and an output terminal of the reset module are connected to a first node, an output terminal of the reset control module is connected with a control terminal of the reset module for turning on the reset module under control of control signal received by control terminal of the reset control module to reset the first node, the output module outputs a shifted signal with multiple pulses before the first node is reset. According to the present invention, a gate driving signal with multiple pulses can be outputted by one shift register unit.