Shift Register Unit for Narrow Border Displays
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current display technologies face challenges in reducing power consumption while maintaining image quality, particularly when the refresh rate is lowered, leading to electric leakage issues that result in abnormal display phenomena like flicker, especially when all pixel circuits are P-type transistors.
Innovation Solution
A shift register unit is designed to simultaneously output reverse gate driving signals for both N-type and P-type transistors, allowing for reduced layout area and enabling narrow border designs while ensuring low power consumption and good picture quality by using a combination of input, output, and control circuits to manage power supply signals effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the refresh rate is lowered to reduce power consumption, then energy consumption decreases, but electric leakage increases causing display abnormalities like flicker
Solution Approach 1:
The gate drive circuit is segmented into separate circuits for N-type transistors and P-type transistors. Each circuit independently provides gate driving signals to its corresponding transistor type, allowing optimized control of leakage current for each transistor type while maintaining low power consumption operation.
Solution Approach 2:
Different control strategies are applied to N-type and P-type transistors based on their distinct electrical characteristics. The gate drive circuits are designed with specific parameters tailored to each transistor type, enabling local optimization of leakage suppression while maintaining overall low power consumption.
2Reliability
If separate gate drive circuits are provided for N-type and P-type transistors, then display quality improves, but the number of circuits increases leading to larger layout area
Solution Approach 1:
Multiple functional components are merged into integrated circuit blocks. The gate drive circuits for N-type and P-type transistors are combined with pixel circuits in an integrated manner, sharing common structures and reducing redundant elements, thereby decreasing the overall layout area while maintaining separate control functionality.
Solution Approach 2:
The gate drive circuits are designed with multi-functional capabilities, serving both as drive signal generators and as part of the pixel circuit structures. This universal design allows single components to fulfill multiple functions, reducing the total number of discrete elements and minimizing layout area.
Data Source
AI summary
Provided is a shift register unit. The shift register unit includes: a first input circuit, connected to a first control terminal, a turn-on signal terminal, a first node and a second node; a second input circuit, connected to a first power supply terminal, the first node and a third node; an output control circuit, connected to the first node, the second node, the third node, a second control terminal and a fourth node; and an output circuit, connected to the second node, the fourth node, the first power supply terminal, a second power supply terminal, a first output terminal and a second output terminal.