Shift Register Driver Circuit to Prevent Flip-Flop Node Floating
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Solution Overview
Problem
Conventional driver circuits experience malfunctions due to timing deviations in transistor switching operations, particularly when transistors with amorphous semiconductor layers deteriorate, leading to changes in threshold voltage and noise interference.
Innovation Solution
A driver circuit with a shift register design that includes flip-flop circuits with specific transistor configurations and signal input structures, where the phase of clock signals is opposite and the potential difference between signal states is greater than the transistor threshold voltage, ensuring stable operation and reducing noise effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate terminal of a pull-up transistor in a flip-flop circuit enters into a floating state in a non-selection period, then noise or the like generated in the non-selection period adversely affects a potential of the gate terminal, but maintaining the gate terminal connected prevents timing deviation
Solution Approach 1:
A capacitor is introduced as an intermediary element to maintain the gate terminal potential during non-selection periods. The capacitor holds the potential value and prevents the gate terminal from entering a floating state, thereby blocking noise interference while maintaining timing accuracy.
Solution Approach 2:
The gate terminal potential is set in advance during the selection period and maintained during the non-selection period through the capacitor. This preliminary action ensures the gate terminal is ready for the next switching operation without being affected by noise in the intervening period.
2Ease of manufacture
If transistors with amorphous semiconductor layers are used, then manufacturing cost is reduced, but the transistor deteriorates easily causing threshold voltage changes and malfunctions
Solution Approach 1:
Capacitors are added to the flip-flop circuit to cushion against the deterioration effects of amorphous semiconductor transistors. By maintaining stable node potentials through these capacitors, the circuit compensates for threshold voltage changes and prevents malfunctions, allowing the use of cost-effective amorphous transistors without sacrificing reliability.
3Reliability
If the gate terminal of the pull-up transistor is kept at a fixed potential, then timing deviation is prevented, but the circuit complexity increases
Solution Approach 1:
The circuit is segmented into functional blocks with clearly defined roles. Capacitors are strategically placed at specific nodes to maintain potentials only where necessary for timing stability, rather than throughout the entire circuit. This segmented approach maintains timing stability while minimizing the increase in circuit complexity.
Data Source
AI summary
To suppress malfunctions in a shift register circuit. A shift register having a plurality of flip-flop circuits is provided. The flip-flop circuit includes a transistor 11, a transistor 12, a transistor 13, a transistor 14, and a transistor 15. When the transistor 13 or the transistor 14 is turned on in a non-selection period, the potential of a node A is set, so that the node A is prevented from entering into a floating state.