Shift Register Circuit Noise Reduction via Periodic Transistor Cycling
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Solution Overview
Problem
Amorphous semiconductor transistors in shift register circuits experience noise and characteristics deterioration due to continuous operation in non-selection periods, leading to malfunction.
Innovation Solution
A shift register circuit design that includes multiple transistors and a specific configuration where VSS is outputted at regular intervals in non-selection periods, ensuring no transistor is always on, reducing noise and maintaining transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a transistor is always turned on in the non-selection period to prevent floating state, then noise is reduced, but transistor characteristics deteriorate over time
Solution Approach 1:
The patent applies periodic action by sequentially turning on different transistors (first transistor, second transistor, third transistor) at regular intervals during the non-selection period. Instead of keeping one transistor continuously on, the system cycles through multiple transistors, each conducting for a specific time window. This periodic switching prevents any single transistor from continuous operation, thereby reducing noise while preventing characteristics deterioration through distributed temporal operation.
Solution Approach 2:
The patent segments the non-selection period into multiple time intervals, with each interval dedicated to a different transistor being turned on. The first transistor operates during one time window, the second transistor during another, and the third transistor during a third window. This segmentation divides the continuous non-selection period into discrete operational segments, ensuring no transistor is always on while maintaining noise reduction through systematic control.
2Reliability
If multiple transistors are used to reduce noise, then transistor characteristics are maintained, but device complexity increases
Solution Approach 1:
The patent implements multi-functionality by designing a circuit where the first transistor, second transistor, and third transistor serve multiple purposes. Each transistor not only functions during its designated operational window but also contributes to noise reduction and characteristics maintenance throughout the non-selection period. The transistors are configured to work together as an integrated system, where their individual functions combine to achieve both noise reduction and reliability without requiring separate dedicated circuits for each function.
Data Source
AI summary
In a semiconductor device and a shift register, low noise is caused in a non-selection period and a transistor is not always on. First to fourth transistors are provided. One of a source and a drain of the first transistor is connected to a first wire, the other of the source and the drain thereof is connected to a gate electrode of the second transistor, and a gate electrode thereof is connected to a fifth wire. One of a source and a drain of the second transistor is connected to a third wire and the other of the source and the drain thereof is connected to a sixth wire.