Shift Register Circuit Noise Reduction for Display Panel Stability

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Solution Overview

Problem

In Gate Driver On Array (GOA) circuits, unstable gate driving signals are amplified, leading to distorted signals and abnormal operation of display panels due to the continuous activation of noise reduction transistors, which causes severe drift in threshold voltage and instability in the gate driving circuit.

Innovation Solution

A shift register circuit with a noise reduction sub-circuit and a pull-down node control sub-circuit is implemented, where the noise reduction sub-circuit controls the potential of the pull-down node to alternate between levels, turning the noise reduction transistor on and off to compensate for threshold voltage drift and stabilize the gate driving signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the noise reduction transistor is continuously turned on to reduce noise, then the noise reduction effect is improved, but the threshold voltage drift increases and the transistor becomes unstable

Engineering Contradiction:
ImprovenoiseVSAvoidthreshold voltage stability
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent applies periodic action by controlling the noise reduction transistor to operate in periodic cycles rather than continuously. The transistor alternates between an on-state (reducing noise) and an off-state (allowing threshold voltage recovery), creating a rhythmic operation pattern that balances noise reduction with transistor stability. This is achieved through periodic switching signals that regulate the transistor's conduction periods.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent implements dynamics by making the noise reduction transistor's operating state changeable rather than fixed. The transistor dynamically transitions between different operational states (on and off) based on timing signals and circuit conditions. This dynamic control allows the system to adapt the transistor's behavior to different operational phases, preventing continuous conduction and its associated threshold voltage drift while maintaining noise reduction effectiveness.

Inventive Principle:
Principle #15Dynamics

2Length of stationary object

If the gate driving signal is transmitted stage by stage to extend the driving range, then the coverage is improved, but the unstable signal is amplified and distortion increases

Engineering Contradiction:
Improvedriving signal transmission distanceVSAvoidsignal stability
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The patent applies feedback by implementing a circuit mechanism where the output signal state influences the input signal generation. The shift register circuit monitors its own output and uses this information to regulate subsequent signal transmission stages. This feedback loop allows the circuit to detect and correct signal degradation, preventing the amplification of instability that would normally occur during multi-stage transmission and extending the reliable driving range.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11222567B2Shift register circuit, method for driving the same, and display device
Publication Date: 2022.01.11 HEFEI XINSHENG OPTOELECTRONICS TECH CO LTD
  • US11222567B2 patent drawing
  • US11222567B2 patent drawing
  • US11222567B2 patent drawing

AI summary

A shift register circuit includes a noise reduction sub-circuit and a pull-down node control sub-circuit. A control end of the noise reduction sub-circuit is connected to a pull-down node, the noise reduction sub-circuit is connected to a first voltage input end. The pull-down node control sub-circuit includes a first pull-down node control sub-circuit and a second pull-down node control sub-circuit. The second pull-down node control sub-circuit controls the pull-down control node to be connected to a first clock signal input end when the first clock signal input end inputs a first level, the pull-down node to be connected to the first clock signal input end when a potential of the pull-down control node is at the first level, so that the potential of the pull-down node is at a first level and a noise reduction transistor included in the noise reduction sub-circuit is turned off.